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參數(shù)資料
| 型號： | AD2S1210CSTZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 16/36頁 |
| 文件大小： | 0K |
| 描述： | IC CONV R/D VAR RES OSC 48-LQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | R/D 轉(zhuǎn)換器 |
| 分辨率（位）： | 10，12，14，16 b |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 電壓電源： | 模擬和數(shù)字 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應(yīng)商設(shè)備封裝： | 48-LQFP（7x7） |
| 包裝： | 托盤 |
| 配用： | EVAL-AD2S1210EDZ-ND - BOARD EVAL AD2S1210 |
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AD2S1210
Rev. A | Page 23 of 36
Address/Data Bit
The MSB of each 8-bit word written to the AD2S1210 indicates
whether the 8-bit word is a register address or data. The MSB
(D7) of each register address defined on the AD2S1210 is high.
The MSB of each data word written to the AD2S1210 is low.
Note that when a data word is written to the AD2S1210, the
MSB is internally reconfigured as a parity bit. When reading
data from any of the read/write registers (see Table 10), the
parity of Bit D6 to Bit D0 is recalculated and compared to the
previously stored parity bit. The MSB of the 8-bit output is used
to indicate whether a configuration error has occurred. If the
MSB is returned high, this indicates that the data read back from
the device does not match the configuration data written to the
device in the previous write cycle.
Phase Lock Range
The phase lock range allows the AD2S1210 to compensate for
phase errors between the excitation frequency and the sine/cosine
inputs. The recommended mode of operation is to use the default
phase lock range of ±44°. If additional phase lock range is
required, a range of 360° can be set. However, in this mode of
operation, the AD2S1210 should be reset following a loss of
signal error. Failure to do so may result in a 180° error in the
angular output data.
Hysteresis
The AD2S1210 includes a hysteresis function, ±1 LSB, between
the output of the position integrator and the input to the position
register. When operating in a noisy environment, this can be used
to prevent flicker on the LSB. On the AD2S1210, the maximum
tracking rate is defined by the bandwidth. Each resolution setting
is internally configured with a different bandwidth, as outlined
in Table 1. The maximum tracking rate and the bandwidth are
inversely proportional to the resolution, that is, the maximum
tracking rate increases as the resolution is decreased. The option
of disabling the hysteresis allows the user to oversample the
position output and to achieve a higher resolution output within
the specified bandwidths through external averaging.
The hysteresis function can be enabled or disabled through
setting Bit D4 in the control register. Hysteresis is enabled by
default on power-up.
Set Encoder Resolution
The resolution of the encoder outputs of the AD2S1210 can be
set to the same resolution as the digital output or it can also be
set to a lower resolution. For example, when the resolution of
the AD2S1210 position outputs is set to 16 bits, the resolution
of the encoder outputs may be set to 14, 12, or 10 bits. This
allows the user to take advantage of the lower bandwidth and
improved performance of the 16-bit resolution setting without
requiring external divide down of the A-quad-B encoder outputs.
The default resolution of the encoder outputs on power-up is 16
bits. Refer to the Incremental Encoder Outputs section.
Table 23. Encoder Resolution Settings
EnRES0
EnRES1
Resolution (Bits)
0
10
0
1
12
1
0
14
1
16
Set Resolution
In normal mode, the resolution of the digital output is selected
using the RES0 and RES1 input pins (see Table 9). In configuration
mode, the resolution is selected by setting the RES0 and RES1
bits in the control register. When switching between normal mode
and configuration mode, it is the responsibility of the user to
ensure that the resolution set in the control register matches the
resolution set by the RES0 and RES1 input pins. The default resolu-
tion of the digital output on power-up is 12 bits.
SOFTWARE RESET REGISTER
Table 24. 8-Bit Register
Address
Bit
Read/Write
0xF0
D7 to D0
Write only
Addressing the software reset register, that is writing the 8-bit
address, 0xF0, of the software reset register to the AD2S1210
while in configuration mode, allows the user to initiate a soft-
ware reset of the AD2S1210. The software reset reinitializes the
excitation frequency outputs and the internal Type II tracking loop.
The data stored in the configuration registers is not overwritten
by a software reset. However, it should be noted that the data in
the fault register is reset. In an application that uses two or more
resolver-to-digital converters, which are both driven from the same
clock source, the software reset can be used to synchronize the
phase of the excitation frequencies across the converters.
FAULT REGISTER
Table 25. 8-Bit Register
Address
Bit
Read/Write
0xFF
D7 to D0
Read only
The AD2S1210 has the ability to detect eight separate fault condi-
tions. When a fault occurs, the DOS and/or the LOT output
pins are taken low. By reading the fault register, the user can
determine the cause of the triggering of the fault detection output
pins. Note that the fault register bits are active high, that is, the
fault bits are taken high to indicate that a fault has occurred.
Table 26. Fault Register Bit Descriptions
Bit
Description
D7
Sine/cosine inputs clipped
D6
Sine/cosine inputs below LOS threshold
D5
Sine/cosine inputs exceed DOS overrange threshold
D4
Sine/cosine inputs exceed DOS mismatch threshold
D3
Tracking error exceeds LOT threshold
D2
Velocity exceeds maximum tracking rate
D1
Phase error exceeds phase lock range
D0
Configuration parity error
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| AD2S1210DSTZ | 功能描述:IC CONV R/D VAR RES OSC 48LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 類型:數(shù)據(jù)采集系統(tǒng)（DAS） 分辨率（位）:16 b 采樣率（每秒）:21.94k 數(shù)據(jù)接口:MICROWIRE?，QSPI?，串行，SPI? 電壓電源:模擬和數(shù)字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN-EP（6x6） 包裝:托盤 |
| AD2S1210DSTZ | 制造商:Analog Devices 功能描述:IC, ADC, 16BIT, PARALLEL, SERIAL, LQFP-4 |
| AD2S1210SST-EP-RL7 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC IC 10-16 Bit R/D Cnvtr w/Ref Oscilltr RoHS:否 制造商:Analog Devices 通道數(shù)量: 結(jié)構(gòu): 轉(zhuǎn)換速率: 分辨率: 輸入類型: 信噪比: 接口類型: 工作電源電壓: 最大工作溫度: 安裝風(fēng)格: 封裝 / 箱體: |
| AD2S1210SSTZ-EPRL7 | 功能描述:IC CONV R/D VAR REF OSC 48LQFP 制造商:analog devices inc. 系列:* 零件狀態(tài):在售 標(biāo)準(zhǔn)包裝:500 |
| AD2S1210WDSTZ | 制造商:Analog Devices 功能描述: |
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