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參數(shù)資料
| 型號： | AD2S1210DSTZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 25/36頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CONV R/D VAR RES OSC 48LQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | R/D 轉(zhuǎn)換器 |
| 分辨率（位）： | 10，12，14，16 b |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 電壓電源： | 模擬和數(shù)字 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應(yīng)商設(shè)備封裝： | 48-LQFP（7x7） |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 790 (CN2011-ZH PDF) |
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AD2S1210
Rev. A | Page 31 of 36
INCREMENTAL ENCODER OUTPUTS
The A, B, and NM incremental encoder emulation outputs are
free running and are valid if the resolver format input signals
applied to the converter are valid.
The AD2S1210 can be configured to emulate a 256-line, a
1024-line, a 4096-line, or a 16,384-line encoder. For example,
if the AD2S1210 is configured for 12-bit resolution, one revolu-
tion produces 1024 A and B pulses. Pulse A leads Pulse B for
increasing angular rotation (that is, clockwise direction).
The resolution of the encoder emulation outputs of the AD2S1210
is generally configured to match the resolution of the digital output.
However, the encoder emulation outputs of the AD2S1210 can also
be configured to have a lower resolution than the digital outputs.
For example, if the AD2S1210 is configured for 16-bit resolu-
tion, then the encoder emulation outputs can also be configured
for 14-bit, 12-bit, or 10-bit resolution. However, the resolution
of the encoder emulation outputs cannot be higher than the
resolution of the digital output. If the AD2S1210 is configured
such that the resolution of the encoder emulation outputs is
higher than the resolution of the digital outputs, the AD2S1210
internally overrides this configuration. In this event, the resolu-
tion of the encoder outputs is set to match the resolution of the
digital outputs. The resolution of the encoder emulation outputs
can be programmed by writing to Bit D3 and Bit D2 of the
control register.
The north marker pulse is generated as the absolute angular
position passes through zero. The north marker pulse width
is set internally for 90° and is defined relative to the A cycle.
Figure 36 details the relationship between A, B, and NM.
07
46
7-
03
5
A
B
NM
Figure 36. A, B, and NM Timing for Clockwise Rotation
The inclusion of A and B outputs allows the AD2S1210 with
resolver solution to replace optical encoders directly without
the need to change or upgrade existing application software.
SUPPLY SEQUENCING AND RESET
The AD2S1210 requires an external reset signal to hold the
RESET input low until VDD is within the specified operating
range of 4.5 V to 5.5 V.
The RESET pin must be held low for a minimum of 10 μs after
VDD is within the specified range (shown as tRST in
).
Applying a
RESET signal to the AD2S1210 initializes the output
position to a value of 0x000 (degrees output through the parallel,
serial, and encoder interfaces) and causes LOS to be indicated
(LOT and DOS pins pulled low), as shown in
.
Failure to apply the correct power-up/reset sequence may result
in an incorrect position indication.
After a rising edge on the RESET input, the device must be allowed
at least tTRACK ms (see
) for the internal circuitry to stabil-
ize and the tracking loop to settle to the step change of the input
position. For the duration of tTRACK fault indications may occur
on the LOT and DOS pins due to the step response caused by
the
RESET. The duration of tTRACK is dependent on the converter
resolution as outlined in
. After tTRACK, the fault register
should be read and cleared as outlined in the
section. The time required to read and clear the fault
register is indicated as tFAULT, and is defined by the interface
speed of the DSP/microprocessor used in the application. (Note
that if position data is acquired via the encoder outputs, these
can be monitored during tTRACK.)
Table 27. tTRACK vs. Resolution (fCLKIN = 8.192 MHz)
Resolution (Bits)
tTRACK (ms)
10
12
20
14
25
16
60
VDD
DOS
LOT
SAMPLE
RESET
VALID
OUTPUT
DATA
07457-
036
tRST
tTRACK
tFAULT
4.75V
Figure 37. Power Supply Sequencing and Reset
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD2S1210DSTZ | 制造商:Analog Devices 功能描述:IC, ADC, 16BIT, PARALLEL, SERIAL, LQFP-4 |
| AD2S1210SST-EP-RL7 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC IC 10-16 Bit R/D Cnvtr w/Ref Oscilltr RoHS:否 制造商:Analog Devices 通道數(shù)量: 結(jié)構(gòu): 轉(zhuǎn)換速率: 分辨率: 輸入類型: 信噪比: 接口類型: 工作電源電壓: 最大工作溫度: 安裝風(fēng)格: 封裝 / 箱體: |
| AD2S1210SSTZ-EPRL7 | 功能描述:IC CONV R/D VAR REF OSC 48LQFP 制造商:analog devices inc. 系列:* 零件狀態(tài):在售 標(biāo)準(zhǔn)包裝:500 |
| AD2S1210WDSTZ | 制造商:Analog Devices 功能描述: |
| AD2S1210WDSTZRL7 | 功能描述:IC CONV R/D VAR REF OSC 48LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Basics 標(biāo)準(zhǔn)包裝:1 系列:- 類型:電機(jī)控制 分辨率（位）:12 b 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，并聯(lián) 電壓電源:單電源 電源電壓:2.7 V ~ 3.6 V，4.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:100-TQFP 供應(yīng)商設(shè)備封裝:100-TQFP（14x14） 包裝:剪切帶 (CT) 其它名稱:296-18373-1 |
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