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參數(shù)資料
| 型號： | AD5227BUJZ50-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 2/16頁 |
| 文件大小： | 0K |
| 描述： | IC DGTL POT 50K UP/DN TSOT23-8 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 接片： | 64 |
| 電阻（歐姆）： | 50k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 35 ppm/°C |
| 存儲器類型： | 易失 |
| 接口： | 3 線串行（芯片選擇，增/減） |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SOT-23-8 薄型，TSOT-23-8 |
| 供應(yīng)商設(shè)備封裝： | TSOT-23-8 |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | AD5227BUJZ50-RL7DKR |
AD5227
Rev. B | Page 10 of 1
6
THEORY OF OPERATION
The AD5227 is a 64-position 3-terminal digitally controlled
potentiometer device. It presets to a midscale at system power-
on. When CS is enabled, changing the resistance settings is
achieved by clocking the CLK pin. It is negative-edge triggered,
and the direction of stepping is determined by the state of the
U/D input. When the wiper reaches the maximum or the
minimum setting, additional CLK pulses do not change the
wiper setting.
04419-0-026
CS
U/D
CLK
GND
VDD
6-BIT UP/DOWN
CONTROL
LOGIC
POR
MIDSCALE
WIPER
REGISTER
A
W
B
AD5227
Figure 24. Functional Block Diagram
04419-
0-
027
B
W
A
D0
D2
D1
D4
D5
D3
RS
RS = RAB/64
RW
RS
RDAC
UP/DOWN
CTRL AND
DECODE
Figure 25. AD5227 Equivalent RDAC Circuit
PROGRAMMING THE DIGITAL POTENTIOMETERS
Rheostat Operation
If only the W-to-B or W-to-A terminals are used as variable
resistors, the unused terminal can be opened or shorted with W.
This operation is called rheostat mode and is shown in Figure 26.
04419-0-028
A
W
B
A
W
B
A
W
B
Figure 26. Rheostat Mode Configuration
The end-to-end resistance, RAB, has 64 contact points accessed
by the wiper terminal, plus the B terminal contact, assuming
RWB by one step. The direction is determined by the state of
U/D pin. The change of RWB can be determined by the number
of clock pulses, provided that the AD5227 has not reached its
maximum or minimum scale. ΔRWB can, therefore, be
approximated as
+
×
±
=
Δ
W
AB
WB
R
CP
R
64
(1)
where:
CP is the number of clock pulses.
RAB is the end-to-end resistance.
RW is the wiper resistance contributed by the on-resistance of
the internal switch.
Since in the lowest end of the resistor string a finite wiper
resistance is present, care should be taken to limit the current
flow between W and B in this state to a maximum pulse current
of no more than 20 mA. Otherwise, degradation or possible
destruction of the internal switches can occur.
Similar to the mechanical potentiometer, the resistance of the
RDAC between the Wiper W and Terminal A also produces a
digitally controlled complementary resistance, RWA. When these
terminals are used, the B terminal can be opened or shorted to
W. Similarly, ΔRWA can be approximated as
()
+
±
=
Δ
W
AB
WA
R
CP
R
64
(2)
Equations 1 and 2 do not apply when CP = 0.
The typical distribution of the resistance tolerance from device
to device is process lot dependent. It is possible to have ±20%
tolerance.
Potentiometer Mode Operation
If all three terminals are used, the operation is called
potentiometer mode. The most common configuration is the
voltage divider operation as shown in Figure 27.
04419-0-029
A
W
B
VI
VC
Figure 27. Potentiometer Mode Configuration
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| AD5227BUJZ50-RL72 | 制造商:AD 制造商全稱:Analog Devices 功能描述:64-Position Up/Down Control Digital Potentiometer |
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| AD5228BUJZ100 | 制造商:Analog Devices 功能描述:DGTL POTENTIOMETER 32POS 100KOHM SGL 8PIN TSOT - Bulk |
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