+V
參數(shù)資料
型號(hào): AD524CDZ
廠商: Analog Devices Inc
文件頁數(shù): 14/28頁
文件大小: 0K
描述: IC AMP INST 1MHZ PREC LN 16CDIP
標(biāo)準(zhǔn)包裝: 1
放大器類型: 儀表
電路數(shù): 1
轉(zhuǎn)換速率: 5 V/µs
增益帶寬積: 1MHz
-3db帶寬: 1MHz
電流 - 輸入偏壓: 15nA
電壓 - 輸入偏移: 50µV
電流 - 電源: 3.5mA
電壓 - 電源,單路/雙路(±): ±6 V ~ 18 V
工作溫度: -25°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 16-CDIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 16-CDIP 側(cè)面銅焊
包裝: 管件
產(chǎn)品目錄頁面: 770 (CN2011-ZH PDF)
AD524
Rev. F | Page 21 of 28
WR
CS
+INPUT
G = 10
–INPUT
G = 100
G = 1000
AD7524
OUT2
39k
AD589
MSB
LSB
C1
GND
OUT1
AD524
+VS
RG1
RG2
+
+
+
–VS
VREF
+VS
R5
20k
R3
20k
R4
10k
–VS
R6
5k
1/2
AD712
1/2
AD712
DATA
INPUTS
–VS
2
8
7
10
6
9
16
13
12
11
3
1
7
6
5
4
1
8
2
3
13
12
11
4
15
14
16
1
2
0
050
0-
05
0
AD524C
G = 100
10k
+10V
350
14-BIT
ADC
0V TO 2V
F.S.
+VS
–VS
RG1
RG2
+
2
8
4
5
10
9
6
7
16
13
12
11
3
1
00
50
0
-0
52
Figure 52. Typical Bridge Application
ERROR BUDGET ANALYSIS
To illustrate how instrumentation amplifier specifications are
applied, review a typical case where an AD524 is required to
amplify the output of an unbalanced transducer. Figure 52
shows a differential transducer, unbalanced by 100 Ω, supplying
a 0 mV to 20 mV signal to an AD524C. The output of the IA
feeds a 14-bit ADC with a 0 V to 2 V input voltage range. The
operating temperature range is 25°C to +85°C. Therefore, the
largest change in temperature, ΔT, within the operating range is
from ambient to +85°C (85°C 25°C = 60°C).
Figure 50. Software Controllable Offset
In many applications, complex software algorithms for autozero
applications are not available. For those applications, Figure 51
provides a hardware solution.
AD524
14
15
16
13
GND
CH
1k
ZERO PULSE
AD7510KD
AD711
A1
A2
A3
A4
VDD
VSS
200s
910
11
12
–VS
VOUT
0.1F LOW
LEAKAGE
+VS
RG1
RG2
2
8
7
10
6
9
16
13
12
11
3
1
8
1
2
+
+
0050
0-
0
51
In many applications, differential linearity and resolution are of
prime importance in cases where the absolute value of a variable is
less important than changes in value. In these applications, only
the irreducible errors (45 ppm = 0.004%) are significant. Further-
more, if a system has an intelligent processor monitoring the
analog-to-digital output, the addition of an autogain/autozero
cycle removes all reducible errors and may eliminate the require-
ment for initial calibration. This also reduces errors to 0.004%.
Figure 51. Autozero Circuit
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