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| 型號： | AD5254BRU100-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 10/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DGTL POT QUAD 100K 20-TSSOP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 接片： | 256 |
| 電阻（歐姆）： | 100k |
| 電路數(shù)： | 4 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 650 ppm/°C |
| 存儲器類型： | 非易失 |
| 接口： | I²C（設(shè)備位址） |
| 電源電壓： | 2.7 V ~ 5.5 V，±2.25 V ~ 2.75 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-TSSOP |
| 包裝： | 帶卷 (TR) |
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AD5253/AD5254
Data Sheet
Rev. C | Page 18 of 32
RDAC/EEMEM Quick Commands
The AD5253/AD5254 feature 12 quick commands that facilitate
easy manipulation of RDAC wiper settings and provide RDAC-
to-EEMEM storing and restoring functions. The command
format is shown in Figure 31, and the command descriptions
are shown in Table 9.
When using a quick command, issuing a third byte is not
needed, but is allowed. The quick commands reset and store
RDAC to EEMEM require acknowledge polling to determine
whether the command has finished executing.
RAB Tolerance Stored in Read-Only Memory
The AD5253/AD5254 feature patented RAB tolerances storage in
the nonvolatile memory. The tolerance of each channel is stored
in the memory during the factory production and can be read
by users at any time. The knowledge of the stored tolerance,
users to predict RAB accurately. This feature is valuable for
precision, rheostat mode, and open-loop applications, in which
knowledge of absolute resistance is critical.
The stored tolerances reside in the read-only memory and are
expressed as percentages. Each tolerance is 16 bits long and is
stored in two memory locations (see Table 10). The tolerance
data is expressed in sign magnitude binary format stored in two
bytes; an example is shown in Figure 32 . For the first byte in
Register N, the MSB is designated for the sign (0 = + and 1 = –)
and the 7 LSB is designated for the integer portion of the
tolerance. For the second byte in Register N + 1, all eight data
bits are designated for the decimal portion of tolerance. As
10 k and the data readback from Address 11000 shows 0001
1100 and Address 11001 shows 0000 1111, then RDAC0
tolerance can be calculated as
MSB: 0 = +
Next 7 MSB: 001 1100 = 28
8 LSB: 0000 1111 = 15 × 2–8 = 0.06
Tolerance = 28.06% and, therefore,
RAB_ACTUAL = 12.806 k
EEMEM Write-Acknowledge Polling
After each write operation to the EEMEM registers, an internal
write cycle begins. The I2C interface of the device is disabled. To
determine if the internal write cycle is complete and the I2C
interface is enabled, interface polling can be executed. I2C
interface polling can be conducted by sending a start condition
followed by the slave address and the write bit. If the I2C
interface responds with an ACK, the write cycle is complete and
the interface is ready to proceed with further operations. Other-
wise, I2C interface polling can be repeated until it succeeds.
Command 2 and Command 7 also require acknowledge polling.
EEMEM Write Protection
Setting the WP pin to logic low after EEMEM programming
protects the memory and RDAC registers from future write
operations. In this mode, the EEMEM and RDAC read
operations function as normal.
Table 9. RDAC-to-EEMEM Interface and RDAC Operation Quick Command Bits (CMD/REG = 1, A2 = 0)
C3
C2
C1
C0
Command Description
0
NOP
0
1
Restore EEMEM (A1, A0) to RDAC (A1, A0)1
0
1
0
Store RDAC (A1, A0) to EEMEM (A1, A0)
0
1
Decrement RDAC (A1, A0) 6 dB
0
1
0
Decrement all RDACs 6 dB
0
1
0
1
Decrement RDAC (A1, A0) one step
0
1
0
Decrement all RDACs one step
0
1
Reset: restore EEMEMs to all RDACs
1
0
Increment RDACs (A1, A0) 6 dB
1
0
1
Increment all RDACs 6 dB
1
0
1
0
Increment RDACs (A1, A0) one step
1
0
1
Increment all RDACs one step
1
0
Reserved
:
1
Reserved
1 This command leaves the device in the EEMEM read power state, which consumes power. Issue the NOP command to return the device to its idle state.
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