參數(shù)資料
型號(hào)： AD5262BRU50-REEL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 11/24頁(yè)
文件大?。?/td> 0K
描述： IC POT DUAL 50K 256POS 16TSSOP
標(biāo)準(zhǔn)包裝： 1,000
接片： 256
電阻（歐姆）： 50k
電路數(shù)： 2
溫度系數(shù)： 標(biāo)準(zhǔn)值 35 ppm/°C
存儲(chǔ)器類型： 易失
接口： 4 線 SPI（芯片選擇）
電源電壓： 4.5 V ~ 16.5 V，±4.5 V ~ 5.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 16-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 16-TSSOP
包裝： 帶卷 (TR)
AD5260/AD5262
Rev. A | Page 19 of 24
APPLICATIONS INFORMATION
BIPOLAR DC OR AC OPERATION FROM DUAL
SUPPLIES
The AD5260/AD5262 can be operated from dual supplies
enabling control of ground referenced ac signals or bipolar
operation. The ac signal, as high as VDD/VSS, can be applied
directly across Terminal A and Terminal B with output taken
from Terminal W. See Figure 58 for a typical circuit connection.
+5.0V
CLK
CS
GND
VDD
SDI
GND
VDD
VSS
–5.0V
SCLK
MOSI
MICROCONTROLLER
SS
±5V p-p
±2.5V p-p
D = 0x80
02
695-
0
58
Figure 58. Bipolar Operation from Dual Supplies
GAIN CONTROL COMPENSATION
Digital potentiometers are commonly used in gain control as in
the noninverting gain amplifier shown in Figure 59.
U1
VO
W
B
A
R2
200k
C2
4.7pF
Vi
R1
47k
C1
25pF
0
269
5-
05
9
Figure 59. Typical Noninvertng Gain Amplifier
Note that when the RDAC B terminal parasitic capacitance is
connected to the op amp noninverting node, it introduces a zero
for the 1/βO term with +20 dB/dec, whereas a typical op amp
gain bandwidth product (GBP) has 20 dB/dec characteristics.
A large R2 and finite C1 can cause this zero’s frequency to fall
well below the crossover frequency. Therefore, the rate of
closure becomes 40 dB/dec and the system has 0 phase margin
at the crossover frequency. The output may ring or oscillate if
the input is a rectangular pulse or step function. Similarly, it is
also likely to ring when switching between two gain values
because this is equivalent to a step change at the input.
Depending on the op amp GBP, reducing the feedback resistor
may extend the zero’s frequency far enough to overcome the
problem. A better approach, however, is to include a compensa-
tion capacitor, C2, to cancel the effect caused by C1. Optimum
compensation occurs when R1 × C1 = R2 × C2. This is not an
option because of the variation of R2. As a result, the R1 × C1 =
R2 × C2 relationship can be used, and scale C2 as if R2 is at its
maximum value. Doing so may overcompensate and compromise
the performance slightly when R2 is set at low values. However,
it avoids the ringing or oscillation at the worst case. For critical
applications, C2 should be found empirically to suit the need.
In general, C2 in the range of a few picofarads (pF) to no more
than a few tenths of pF is usually adequate for the compensation.
Similarly, there are W and A terminal capacitances connected to
the output (not shown). Fortunately, their effect at this node is less
significant, and the compensation can be avoided in most cases.
PROGRAMMABLE VOLTAGE REFERENCE
For voltage divider mode operation, shown in Figure 60, it is
common to buffer the output of the digital potentiometer unless
the load is much larger than RWB. Not only does the buffer serve
the purpose of impedance conversion, but it also allows a
heavier load to be driven.
A1
VO
5V
VIN
GND
VOUT
5V
AD1582
U1
AD8601
1
2
3
A
W
B
AD5260
02
695
-060
Figure 60. Programmable Voltage Reference
8-BIT BIPOLAR DAC
Figure 61 shows a low cost 8-bit bipolar DAC. It offers the same
number of adjustable steps but not the precision of conventional
DACs. The linearity and temperature coefficients, especially at low
values codes, are skewed by the effects of the digital potentiometer
wiper resistance. The output of this circuit is
REF
O
V
D
V
×
=
1
256
2
(4)
A2
–5V
OP2177
BA
W
W1
A1
VO
+5V
–5V
+5V
U2
+5VREF
–5VREF
VIN
VOUT
GND
TRIM
AD5260
Vi
ADR425
R
U1
OP2177
0
269
5-
06
1
Figure 61. 8-Bit Bipolar DAC
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