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參數(shù)資料
| 型號： | AD5273EVAL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 10/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR AD5273 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 數(shù)字電位器 |
| 已用 IC / 零件： | AD5273 |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | AD5273BRJZ10-R7DKR-ND - IC DGTL POT 64P 10K OTP SOT23-8 AD5273BRJZ50-REEL7TR-ND - IC POT DGTL 50K 64POS SOT23 AD5273BRJZ100-R7TR-ND - IC POT DGTL 1K 64POS SOT23 AD5273BRJZ1-REEL7TR-ND - IC POT DGTL 1K 64POS SOT23 AD5273BRJZ10-R7CT-ND - IC DGTL POT 64P 10K OTP SOT23-8 AD5273BRJZ10-R7TR-ND - IC DGTL POT 64P 10K OTP SOT23-8 AD5273BRJ10-R2CT-ND - IC DGTL POT 10K 64POS SOT23-8 AD5273BRJ1-R2CT-ND - IC DGTL POT 1K 64POS SOT23-8 AD5273BRJ100-R2CT-ND - IC DGTL POT 100K 64POS SOT23-8 AD5273BRJ50-R2CT-ND - IC DGTL POT 50K 64POS SOT23-8 |
AD5273
Rev. H | Page 18 of 24
4.
When all data bits have been read or written, a stop con-
dition is established by the master. A stop condition is
defined as a low-to-high transition on the SDA line
while SCL is high. In write mode, the master pulls the
SDA line high during the 10th clock pulse to establish a
read mode, the master issues a no acknowledge for the
ninth clock pulse, that is, the SDA line remains high. The
master then brings the SDA line low before the 10th clock
pulse, which goes high to establish a stop condition, as
shown in Figure 44.
A repeated write function gives the user flexibility to
update the RDAC output continuously, except after
permanent programming, when the part is addressed and
receives instructions only once. During the write cycle,
each data byte updates the RDAC output. For example,
after the RDAC has acknowledged its slave address and
instruction bytes, the RDAC output updates after these two
bytes. If another byte is written to the RDAC while it is still
addressed to a specific slave device with the same instruc-
tion, this byte updates the output of the selected slave device.
If different instructions are needed, the write mode must
be started again with a new slave address, instruction, and
data bytes. Similarly, a repeated read function of the RDAC
is also allowed.
CONTROLLING TWO DEVICES ON ONE BUS
Figure 45 shows two AD5273 devices on the same serial bus.
Each has a different slave address because the state of each AD0
pin is different. This allows each device to operate independently.
The master device output bus line drivers are open-drain pull-
down in a fully I2C-compatible interface.
MASTER
SDA SCL
AD0
AD5273
SDA SCL
AD0
AD5273
SDA
SCL
5V
RP
5V
03
22
4-
04
5
Figure 45. Two AD5273 Devices on One Bus
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD5274 | 制造商:AD 制造商全稱:Analog Devices 功能描述:1024-/256-Position, 1% Resistor Tolerance Error, I2C Interface and 50-TP Memory Digital Rheostat |
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| AD5274BCPZ-20-RL7 | 功能描述:IC RHEOSTAT 5V 50-TP 256 10MSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:DPP 接片:32 電阻（歐姆）:10k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 300 ppm/°C 存儲器類型:非易失 接口:3 線串行（芯片選擇，遞增，增/減） 電源電壓:2.5 V ~ 6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-WFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:8-TDFN（2x3） 包裝:帶卷 (TR) |
| AD5274BRMZ-100 | 功能描述:IC RHEOSTAT 5V 50TP 256 10MSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 接片:256 電阻（歐姆）:100k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 35 ppm/°C 存儲器類型:非易失 接口:3 線串口 電源電壓:2.7 V ~ 5.25 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-WDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:8-TDFN-EP（3x3） 包裝:剪切帶 (CT) 產(chǎn)品目錄頁面:1399 (CN2011-ZH PDF) 其它名稱:MAX5423ETA+TCT |
| AD5274BRMZ-100-RL7 | 功能描述:IC RHEOSTAT 5V 50-TP 256 10MSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:DPP 接片:32 電阻（歐姆）:10k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 300 ppm/°C 存儲器類型:非易失 接口:3 線串行（芯片選擇，遞增，增/減） 電源電壓:2.5 V ~ 6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-WFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:8-TDFN（2x3） 包裝:帶卷 (TR) |
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