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參數(shù)資料
| 型號： | AD5290YRMZ50-R7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 8/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC POT DGTL 50KW 256POS 10-MSOP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 接片： | 256 |
| 電阻（歐姆）： | 50k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 35 ppm/°C |
| 存儲器類型： | 易失 |
| 接口： | 4 線 SPI（芯片選擇） |
| 電源電壓： | 4.5 V ~ 30 V，±4.5 V ~ 15 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-MSOP |
| 包裝： | 帶卷 (TR) |
| 配用： | EVAL-AD5290EBZ-ND - BOARD EVAL FOR AD5290 |
AD5290
Data Sheet
Rev. C | Page 16 of 20
PROGRAMMING THE POTENTIOMETER DIVIDER
Voltage Output Operation
The digital potentiometer easily generates a voltage divider
at wiper to B and wiper to A proportional to the input voltage
at A to B. Unlike the polarity of VDD to GND, which must be
positive, voltage across A to B, W to A, and W to B can be at
either polarity.
A
VI
W
B
VO
04716-013
Figure 28. Potentiometer Mode Configuration
If ignoring the effect of the wiper resistance for simplicity, con-
necting the A terminal to 30 V and the B terminal to ground
produces an output voltage at the Wiper W to Terminal B
ranging from 0 V to 1 LSB less than 30 V. Each LSB of voltage
is equal to the voltage applied across Terminal A and Terminal B,
divided by the 256 positions of the potentiometer divider. The
general equation defining the output voltage at VW with respect
to ground for any valid input voltage applied to Terminal A and
Terminal B is
B
A
W
V
D
V
D
V
×
+
×
=
256
)
(
(3)
Operation of the digital potentiometer in the divider mode
results in a more accurate operation over temperature. Unlike
the rheostat mode, the output voltage is dependent mainly on
the ratio of the internal resistors RWA and RWB and not the
absolute values. Therefore, the temperature drift reduces to
5 ppm/°C.
3-WIRE SERIAL BUS DIGITAL INTERFACE
The AD5290 contains a 3-wire digital interface (CS, CLK,
and SDI). The 8-bit serial word must be loaded MSB first.
The format of the word is shown in Table 4. The positive edge
sensitive CLK input requires clean transitions to avoid clocking
incorrect data into the serial input register. Standard logic fami-
lies work well. When CS is low, the clock loads data into the
serial register on each positive clock edge.
The data setup and data hold times in the Specifications section
determine the valid timing requirements. The AD5290 uses an
8-bit serial input data register word that is transferred to the
internal RDAC register when the CS line returns to logic high.
Extra MSB bits are ignored.
DAISY CHAIN OPERATION
SDO shifts out the SDI content in the previous frame; thus it
can be used for daisy-chaining multiple devices. The SDO pin
contains an open drain N-Ch MOSFET and requires a pull-
up resistor if the SDO function is used. Users need to tie the
SDO pin of one package to the SDI pin of the next package.
Users may need to increase the clock period because the pull-up
resistor and the capacitive loading at the SDO to SDI interface
can induce time delay to the subsequent devices.
For example, in Figure 29, if two AD5290s are daisy-chained, a
total of 16 bits of data are required for each operation. The first
set of eight bits goes to U2, and the second set of eight bits goes
to U1. The CS should be kept low until all 16 bits are clocked
into their respective serial registers. The CS is then pulled high
to complete the operation.
AD5290
U1
SDO
SDI
CLK
CS
AD5290
U2
SDO
SDI
CLK
CS
C
+5V
RPU
2.2k
MOSI
SS
SCLK
04716-
014
Figure 29. Daisy Chain Configuration
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD5290YRMZ50-RL7 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Compact +30V/【15V 256-Position Digital Potentiometer |
| AD5291 | 制造商:AD 制造商全稱:Analog Devices 功能描述:256-/1024-Position, DigiPOT+ Potentiometers with Maximum ±1% R-Tolerance Error and 20-TP Memory |
| AD5291BRUZ-100 | 制造商:Analog Devices 功能描述: |
| AD5291BRUZ-100-RL7 | 制造商:Analog Devices 功能描述: |
| AD5291BRUZ-20 | 功能描述:IC POT DIG 1024P SPI 20K 14TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 接片:256 電阻（歐姆）:100k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 35 ppm/°C 存儲器類型:非易失 接口:3 線串口 電源電壓:2.7 V ~ 5.25 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-WDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:8-TDFN-EP（3x3） 包裝:剪切帶 (CT) 產(chǎn)品目錄頁面:1399 (CN2011-ZH PDF) 其它名稱:MAX5423ETA+TCT |
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