參數(shù)資料
型號(hào)： AD5292BRUZ-100-RL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 22/32頁(yè)
文件大?。?/td> 0K
描述： IC DGTL POT 1024POS 20K 14TSSOP
設(shè)計(jì)資源： Variable Gain Noninverting Amplifier Using AD5292 and OP184 (CN0112)
Variable Gain Inverting Amplifier Using AD5292 and OP184 (CN0113)
Low Cost, High Voltage, Programmable Gain Instrumentation Amplifier Using AD5292 and AD8221 (CN0114)
Programmable High Voltage Source with Boosted Output Current Using AD5292, OP184, and MOSFETs (CN0115)
Programmable Bidirectional Current Source Using AD5292 and ADA4091-4 (CN0117)
Logarithmic Audio Volume Control with Glitch Reduction Using AD5292 (CN0120)
標(biāo)準(zhǔn)包裝： 1,000
接片： 1024
電阻（歐姆）： 100k
電路數(shù)： 1
溫度系數(shù)： 標(biāo)準(zhǔn)值 35 ppm/°C
存儲(chǔ)器類型： 非易失
接口： 4 線串行
電源電壓： 9 V ~ 33 V，±9 V ~ 16.5 V
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 14-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 14-TSSOP
包裝： 帶卷 (TR)
AD5291/AD5292
Rev. D | Page 29 of 32
AUDIO VOLUME CONTROL
The excellent THD performance and high voltage capability
make the AD5291 and AD5292 ideal for a digital volume
control as an audio attenuator or gain amplifier. A typical
problem in these systems is that a large step change in the
volume level at any arbitrary time can lead to an abrupt
discontinuity of the audio signal causing an audible zipper
noise. To prevent this, a zero-crossing window detector can be
inserted to the SYNC line to delay the device update until the
audio signal crosses the window. Because the input signal can
operate on top of any dc level rather than absolute zero volt
level, zero-crossing in this case means the signal is ac-coupled,
and the dc offset level is the signal zero reference point.
The configuration to reduce zipper noise is shown in Figure 74,
and the results of using this configuration is shown in Figure 75.
The input is ac-coupled by C1 and attenuated down before feeding
into the window comparator formed by U2, U3, and U4B. U6 is
used to establish the signal zero reference. The upper limit of
the comparator is set above its offset and, therefore, the output
pulses high whenever the input falls between 2.502 V and 2.497 V
(or 0.005 V window) in this example. This output is AND’ed
with the SYNC signal such that the AD5291 and AD5292
updates whenever the signal crosses the window. To avoid a
constant update of the device, the SYNC signal should be
programmed as two pulses, rather than as one.
In Figure 75, the lower trace shows that the volume level changes
from a quarter-scale to full-scale when a signal change occurs
near the zero-crossing window.
07
67
4-
15
7
R1
100k
R2
200
5V
VIN
V+
V–
AD8541
5V
U6
R3
100k
R4
90k
R5
10k
C1
1F
VDD
VSS
SCLK
SDIN
V+
V–
AD5292
20k
+15V
–15V
C3
0.1F
C2
0.1F
A
B
W
GND
SDIN
SCLK
U1
VCC
GND
VCC
GND
ADCMP371
+15V
–15V
+5V
U3
U2
VOUT
U5
U4A
U4B
1
6
2
4
5
7408
SYNC
Figure 74. Audio Volume Control with Zipper Noise Reduction
0
76
74
-1
58
CHANNEL 1
FREQ = 20.25kHz
1.03V p-p
1
2
Figure 75. Zipper Noise Detector
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