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參數(shù)資料
型號: AD5310BRTZ-REEL
廠商: Analog Devices Inc
文件頁數(shù): 10/16頁
文件大小: 0K
描述: IC DAC 10BIT R-R W/BUFF SOT23-6
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 1
設(shè)置時間: 6µs
位數(shù): 10
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 1.25mW
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: SOT-23-6
供應(yīng)商設(shè)備封裝: SOT-23-6
包裝: 標(biāo)準(zhǔn)包裝
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): 167k
產(chǎn)品目錄頁面: 782 (CN2011-ZH PDF)
其它名稱: AD5310BRTZ-REELDKR
Data Sheet
AD5310
Rev. B | Page 3 of 16
SPECIFICATIONS
VDD = 2.7 V to 5.5 V; temperature range = 40°C to +105°C RL = 2 k to GND; CL = 500 pF to GND; all specifications TMIN to TMAX unless
otherwise noted
Table 1.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
STATIC PERFORMANCE1
Resolution
10
Bits
Relative Accuracy
±4
LSB
Differential Nonlinearity
±0.5
LSB
Guaranteed monotonic by design (see Figure 6)
Zero Code Error
5
40
mV
All 0s loaded to DAC register (see Figure 9)
Full-Scale Error
0.15
1.25
% of FSR
All 1s loaded to DAC register (see Figure 9)
Gain Error
±1.25
% of FSR
Zero Code Error Drift
20
V/°C
Gain Temperature Coefficient
5
ppm of FSR/°C
OUTPUT CHARACTERISTICS2
Output Voltage Range
0
VDD
V
Output Voltage Settling Time
6
8
s
scale to scale change (100 hex to 300 hex)
Slew Rate
1
V/s
RL = 2 kΩ; 0 pF < CL < 500 pF (see Figure 19)
Capacitive Load Stability
470
pF
RL = ∞
1000
pF
RL = 2 kΩ
Digital-to-Analog Glitch Impulse
20
nV-s
1 LSB change around major carry (see Figure 22)
Digital Feedthrough
0.5
nV-s
DC Output Impedance
1
Ω
Short-Circuit Current
50
mA
VDD = 5 V
20
mA
VDD = 3 V
Power-Up Time
2.5
s
Coming out of power-down mode, VDD = 5 V
5
s
Coming out of power-down mode, VDD = 3 V
LOGIC INPUTS2
Input Current
±1
A
VINL, Input Low Voltage
0.8
V
VDD = 5 V
VINL, Input Low Voltage
0.6
V
VDD = 3 V
VINH, Input High Voltage
2.4
V
VDD = 5 V
VINH, Input High Voltage
2.1
V
VDD = 3 V
Pin Capacitance
3
pF
POWER REQUIREMENTS
VDD
2.7
5.5
V
IDD (Normal Mode)
DAC active and excluding load current
VDD = 4.5 V to 5.5 V
140
250
A
VIH = VDD and VIL = GND
VDD = 2.7 V to 3.6 V
115
200
A
VIH = VDD and VIL = GND
IDD (All Power-Down Modes)
VDD = 4.5 V to 5.5 V
0.2
1
A
VIH = VDD and VIL = GND
VDD = 2.7 V to 3.6 V
0.05
1
A
VIH = VDD and VIL = GND
Power Efficiency
IOUT/IDD
93
%
ILOAD = 2 mA, VDD = 5 V
1
Linearity calculated using a reduced code range of 12 to 1011. Output unloaded.
2
Guaranteed by design and characterization; not production tested.
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