參數(shù)資料
型號: AD5340BRUZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 26/28頁
文件大小: 0K
描述: IC DAC 12BIT SNGL VOUT 24-TSSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
產(chǎn)品變化通告: Product Discontinuance 27/Oct/2011
標(biāo)準(zhǔn)包裝: 1,000
設(shè)置時間: 8µs
位數(shù): 12
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 1.25mW
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): 125k
AD5330/AD5331/AD5340/AD5341
Rev. A | Page 7 of 28
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
BUFFER
8-BIT
DAC
REGISTER
INPUT
REGISTER
INT
E
RF
ACE
L
O
G
IC
POWER-DOWN
LOGIC
BUF
GAIN
DB7
DB0
..
CS
WR
CLR
LDAC
VREF
VDD
VOUT
PD
GND
AD5330
POWER-ON
RESET
10
9
7
6
13
20
8
1
3
12
4
11
5
06
85
2-
0
03
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
LDAC
GAIN
WR
CS
GND
BUF
VREF
VOUT
CLR
NC = NO CONNECT
NC
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
VDD
PD
TOP VIEW
(Not to Scale)
AD5330
8-BIT
0
685
2-
0
04
Figure 3. AD5330 Functional Block Diagram
Figure 4. AD5330 Pin Configuration
Table 5. AD5330 Pin Function Descriptions
Pin No.
Mnemonic
Description
1
BUF
Buffer Control Pin. This pin controls whether the reference input to the DAC is buffered or unbuffered.
2
NC
No Connect.
3
VREF
Reference Input.
4
VOUT
Output of DAC. Buffered output with rail-to-rail operation.
5
GND
Ground reference point for all circuitry on the part.
6
CS
Active Low Chip Select Input. This is used in conjunction with WR to write data to the parallel interface.
7
WR
Active Low Write Input. This is used in conjunction with CS to write data to the parallel interface.
8
GAIN
Gain Control Pin. This controls whether the output range from the DAC is 0 V to VREF or 0 V to 2 × VREF.
9
CLR
Asynchronous active low control input that clears all input registers and DAC registers to zero.
10
LDAC
Active low control input that updates the DAC registers with the contents of the input registers.
11
PD
Power-Down Pin. This active low control pin puts the DAC into power-down mode.
12
VDD
Power Supply Input. These parts can operate from 2.5 V to 5.5 V and the supply should be decoupled with a
10 μF capacitor in parallel with a 0.1 μF capacitor to GND.
13 to 20
DB0 to DB7
Eight Parallel Data Inputs. DB7 is the MSB of these eight bits.
相關(guān)PDF資料
PDF描述
VE-B6M-MV-F2 CONVERTER MOD DC/DC 10V 150W
ICS85356AMILFT IC CLOCK MUX 2:1 900MHZ 20-SOIC
V150A8H400BL3 CONVERTER MOD DC/DC 8V 400W
V150A8H400BL CONVERTER MOD DC/DC 8V 400W
V150A8H400B3 CONVERTER MOD DC/DC 8V 400W
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD5340BRUZ-REEL71 制造商:AD 制造商全稱:Analog Devices 功能描述:2.5 V to 5.5 V, 115 ??A, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs
AD5341 制造商:AD 制造商全稱:Analog Devices 功能描述:2.5 V to 5.5 V, 500 uA, Parallel Interface Quad Voltage-Output 8-/10-/12-Bit DACs
AD5341BRU 制造商:Analog Devices 功能描述:DAC 1-CH Resistor-String 12-bit 20-Pin TSSOP 制造商:Analog Devices 功能描述:IC 12BIT DAC SMD 5341 TSSOP20
AD5341BRU-REEL 制造商:Analog Devices 功能描述:DAC 1-CH Resistor-String 12-bit 20-Pin TSSOP T/R
AD5341BRU-REEL7 制造商:Analog Devices 功能描述:DAC 1-CH Resistor-String 12-bit 20-Pin TSSOP T/R