參數(shù)資料
型號： AD5360BCPZ
廠商： Analog Devices Inc
文件頁數(shù)： 10/29頁
文件大?。?/td> 0K
描述： IC DAC 16BIT 16CH SERIAL 56LFCSP
產(chǎn)品培訓(xùn)模塊： Data Converter Fundamentals
DAC Architectures
設(shè)計資源： Automated Calibration Technique That Reduces AD5360 Offset Voltage to Less Than 1 mV (CN0123)
16 Channels of Programmable Output Span Using AD5360 (CN0131)
標(biāo)準(zhǔn)包裝： 1
設(shè)置時間： 20µs
位數(shù)： 16
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 16
電壓電源： 雙 ±
功率耗散（最大）： 245mW
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 56-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 56-LFCSP-VQ（8x8）
包裝： 托盤
輸出數(shù)目和類型： 16 電壓，單極；16 電壓，雙極
配用： EVAL-AD5360EBZ-ND - BOARD EVAL FOR AD5360
AD5360/AD5361
Rev. A | Page 17 of 28
OUTPUT AMPLIFIER
Because the output amplifiers can swing to 1.4 V below the
positive supply and 1.4 V above the negative supply, this limits
how much the output can be offset for a given reference voltage.
For example, it is not possible to have a unipolar output range of
20 V because the maximum supply voltage is ±16.5 V.
CLR
DAC
CHANNEL
OFFSET
DAC
OUTPUT
R6
10k
R2
20k
S3
S2
S1
R4
60k
R3
20k
SIGGND
R5
60k
R1
20k
05
76
1-
0
06
Figure 23. Output Amplifier and Offset DAC
Figure 23 shows details of a DAC output amplifier and its
connections to the offset DAC. On power-up, S1 is open,
disconnecting the amplifier from the output. S3 is closed, so
the output is pulled to SIGGND. S2 is also closed to prevent
the output amplifier from being open-loop. If CLR is low at
power-up, the output remains in this condition until CLR is
taken high. The DAC registers can be programmed, and the
outputs assume the programmed values when CLR is taken
high. Even if CLR is high at power-up, the output remains
in this condition until VDD > 6 V and VSS < 4 V and the
initialization sequence has finished. The outputs then go to
their power-on default values.
TRANSFER FUNCTION
The output voltage of a DAC in the AD5360/AD5361 is dependent
on the value in the input register, the value of the M and C
registers, and the value in the offset DAC. The transfer functions
for the AD5360/AD5361 are shown in the following sections.
AD5360 Transfer Function
The input code is the value in the X1A or X1B register that is
applied to DAC (X1A, X1B default code = 32,768)
DAC_CODE = INPUT_CODE × (M + 1)/216 + C 215
DAC output voltage
VOUT = 4 × VREF × (DAC_CODE (OFFSET_CODE × 4))/
216 + VSIGGND
where:
DAC_CODE should be within the range of 0 to 65,535.
VREF = 3.0 V, for a 12 V span.
VREF = 5.0 V, for a 20 V span.
M = code in gain register default code = 216 – 1.
C = code in offset register default code = 215.
OFFSET_CODE is the code loaded to the offset DAC. It is
multiplied by 4 in the transfer function because this DAC is a
14-bit device. On power-up, the default code loaded to the
offset DAC is 8192 (0x2000). With a 10 V reference, this gives
a span of 10 V to +10 V.
AD5361 Transfer Function
The input code is the value in the X1A or X1B register that is
applied to DAC (X1A, X1B default code = 8192)
DAC_CODE = INPUT_CODE × (M + 1)/214 + C 213
DAC output voltage
VOUT = 4 × VREF × (DAC_CODE OFFSET_CODE)/214 +
VSIGGND
where:
DAC_CODE should be within the range of 0 to 16,383.
VREF = 3.0 V, for a 12 V span.
VREF = 5.0 V, for a 20 V span.
M = code in gain register default code = 214 1.
C = code in offset register default code = 213.
OFFSET_CODE is the code loaded to the offset DAC.
On power-up, the default code loaded to the offset DAC
is 8192 (0x2000). With a 5 V reference, this gives a span of
10 V to +10 V.
REFERENCE SELECTION
The AD5360/AD5361 have two reference input pins. The
voltage applied to the reference pins determines the output
voltage span on VOUT0 to VOUT15. VREF0 determines the
voltage span for VOUT0 to VOUT7 (Group 0), and VREF1
determines the voltage span for VOUT8 to VOUT15 (Group 1).
The reference voltage applied to each VREF pin can be different,
if required, allowing each group of eight channels to have a
different voltage span. The output voltage range and span can
be adjusted by programming the offset register and gain register
for each channel as well as programming the offset DAC. If the
offset and gain features are not used (that is, the M and C
registers are left at their default values), the required reference
levels can be calculated as follows:
VREF = (VOUTMAX VOUTMIN)/4
If the offset and gain features of the AD5360/AD5361 are used,
the required output range is slightly different. The chosen
output range should take into account the system offset and
gain errors that need to be trimmed out. Therefore, the chosen
output range should be larger than the actual, required range.
The required reference levels can be calculated as follows:
1.
Identify the nominal output range on VOUT.
2.
Identify the maximum offset span and the maximum gain
required on the full output signal range.
3.
Calculate the new maximum output range on VOUT,
including the expected maximum offset and gain errors.
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