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參數(shù)資料
| 型號： | AD5384BBC-5REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 24/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 14BIT 40CH 5V 100-CSPBGA |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 產(chǎn)品變化通告： | AD5384 Models Discontinuation 15/May/2012 |
| 標(biāo)準(zhǔn)包裝： | 400 |
| 設(shè)置時間： | 8µs |
| 位數(shù)： | 14 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 40 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 80mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LFBGA，CSPBGA |
| 供應(yīng)商設(shè)備封裝： | 100-CSBGA（10x10） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 40 電壓，單極 |
| 采樣率（每秒）： | 125k |
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AD5384
Data Sheet
Each of the 40 DAC channels on the AD5384 contains an A and
B data register. Note that the B registers load only when toggle
mode is enabled. The sequence of events when configuring the
AD5384 for toggle mode is
1. Enable toggle mode for the required channels via the
control register.
2. Load data to A registers.
3. Load data to B registers.
4. Apply LDAC.
The LDAC is used to switch between the A and B registers in
determining the analog output. The first LDAC configures the
output to reflect the data in the A registers. This mode offers
significant advantages if the user wants to generate a square
wave at the output of all 40 channels, as can be required to drive
a liquid crystal-based variable optical attenuator. In this case,
the user writes to the control register, and enables the toggle
function by setting CR6 to CR2 = 1, thus enabling the five
groups of eight for toggle mode operation. The user must then
load data to all 40 A and B registers. Toggling LDAC sets the
output values to reflect the data in the A and B registers. The
frequency of the LDAC determines the frequency of the square
wave output.
Toggle mode is disabled via the control register. The first LDAC
that follows the disabling of toggle mode, updates the outputs
with the data contained in the A registers.
THERMAL MONITOR FUNCTION
The AD5384 contains a temperature shutdown function to
protect the chip if multiple outputs are shorted. The short-
circuit current of each output amplifier is typically 40 mA.
Operating the AD5384 at 5 V leads to a power dissipation of
200 mW per shorted amplifier. With five channels shorted, this
leads to an extra watt of power dissipation. For the 100-lead
CSP_BGA, the θJA is typically 44°C/W.
Enable the thermal monitor via the CR8 bit in the control
register. The output amplifiers on the AD5384 automatically
power down if the die temperature exceeds approximately
130°C. After a thermal shutdown occurs, reenable the device by
executing a soft power-up, if the temperature drops below
130°C, or by turning off the thermal monitor function via the
control register.
AD5384 IN A MEMS-BASED OPTICAL SWITCH
In their feed-forward control paths, MEMS-based optical
switches require high resolution DACs that offer high channel
density with 14-bit monotonic behavior. The 40-channel, 14-bit
AD5384 DAC satisfies these requirements. In the circuit in
Figure 32, the 0 V to 5 V outputs of the AD5384 are amplified
to achieve an output range of 0 V to 200 V, which is used to
control actuators that determine the position of MEMS mirrors
in an optical switch. The exact position of each mirror is
measured using sensors. The sensor outputs are multiplexed
into a high resolution ADC in determining the mirror position.
The control loop is closed and driven by an ADSP-21065L, a
32-bit SHARC DSP with an SPI-compatible SPORT interface.
The ADSP-21065L writes data to the DAC, controls the
multiplexer, and reads data from the ADC via the serial
interface.
ACTUATORS
FOR MEMS
MIRROR
ARRAY
SENSOR
AND
MULTIPLEXER
8-CHANNEL ADC
(AD7856)
OR
SINGLE-CHANNEL
ADC (AD7671)
AD5384
14-BIT DAC
REF_OUT REF_IN
-
AVDDx
VOUT1
VOUT39
G = 50
OUTPUT RANGE
0V TO 200V
ADSP-21065L
0.01F
04652-
034
5V
Figure 32. MEMS-Based Optical Switch
Rev. B | Page 30 of 32
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