t1 24 1 2 t
參數(shù)資料
型號(hào): AD5391BCPZ-5-REEL7
廠商: Analog Devices Inc
文件頁(yè)數(shù): 4/44頁(yè)
文件大?。?/td> 0K
描述: IC DAC 12BIT 16CHAN 5V 64LFCSP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
產(chǎn)品變化通告: AD5390/1/2 Redesign Change 16/May/2012
設(shè)計(jì)資源: 8 to 16 Channels of Programmable Voltage with Excellent Temperature Drift Performance Using AD5390/1/2 (CN0029)
AD5390/91/92 Channel Monitor Function (CN0030)
標(biāo)準(zhǔn)包裝: 750
設(shè)置時(shí)間: 6µs
位數(shù): 12
數(shù)據(jù)接口: I²C,串行
轉(zhuǎn)換器數(shù)目: 16
電壓電源: 單電源
功率耗散(最大): 35mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 64-LFCSP-VQ(9x9)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 16 電壓,單極
采樣率(每秒): 167k
配用: EVAL-AD5391EBZ-ND - BOARD EVALUATION FOR AD5391
AD5390/AD5391/AD5392
Data Sheet
Rev. E | Page 12 of 44
t1
24
1
2
t3
t2
t5
t7
t4
t6
t8
t9
t10
t13
t12
t14
t17
t13
t15
t18
t19
t16
VOUT 2
CLR
VOUT
1LDAC ACTIVE DURING BUSY
2LDAC ACTIVE DURING BUSY
SCLK
SYNC
DIN
BUSY
LDAC1
LDAC2
VOUT 1
DB0
DB23
t17
t11
03773-
005
Figure 3. Serial Interface Timing Diagram (Standalone Mode)
SELECTED REGISTER DATA
CLOCKED OUT
DB23
DB0
DB23'
DB0
48
NOP CONDITION
UNDEFINED
SDO
SCLK
SYNC
DIN
DB23
DB0
INPUT WORD SPECIFIES
REGISTER TO BE READ
24
t7A
03773-
006
Figure 4. Serial Interface Timing Diagram (Data Readback Mode)
IOL
200A
50pF
TO
OUTPUT
PIN
IOH
CL
VOH (MIN) OR
VOL (MAX)
03773-
003
Figure 5. Load Circuit for Digital Output Timing
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