TA = 25°C, unl" />
參數(shù)資料
型號: AD5412AREZ
廠商: Analog Devices Inc
文件頁數(shù): 3/44頁
文件大?。?/td> 0K
描述: IC DAC 12BIT SER 24TSSOP
設(shè)計資源: Simplified 12-Bit Voltage and 4 mA-to-20 mA Output Solution Using AD5412 (CN0097)
標準包裝: 62
設(shè)置時間: 25µs
位數(shù): 12
數(shù)據(jù)接口: MICROWIRE?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 模擬和數(shù)字,雙 ±
功率耗散(最大): 128mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm)裸露焊盤
供應(yīng)商設(shè)備封裝: 24-TSSOP 裸露焊盤
包裝: 管件
輸出數(shù)目和類型: 1 電流,單極;1 電流,雙極;1 電壓,單極;1 電壓,雙極
采樣率(每秒): 40k
產(chǎn)品目錄頁面: 782 (CN2011-ZH PDF)
Data Sheet
AD5412/AD5422
Rev. I | Page 11 of 44
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted. Transient currents of up to
80 mA do not cause SCR latch-up.
Table 5.
Parameter
Rating
AVDD to GND
0.3 V to +48 V
AVSS to GND
+0.3 V to 28 V
AVDD to AVSS
0.3 V to +60 V
DVCC to GND
0.3 V to +7 V
Digital Inputs to GND
0.3 V to DVCC + 0.3 V or 7 V
(whichever is less)
Digital Outputs to GND
0.3 V to DVCC + 0.3 V or 7 V
(whichever is less)
REFIN/REFOUT to GND
0.3 V to +7 V
VOUT to GND
AVSS to AVDD
IOUT to GND
0.3 V to AVDD
Operating Temperature Range (TA)
Industrial1
40°C to +85°C
Storage Temperature Range
65°C to +150°C
Junction Temperature (TJ max)
125°C
24-Lead TSSOP_EP Package
θJA Thermal Impedance2
35°C/W
40-Lead LFCSP Package
θJA Thermal Impedance2
33°C/W
Power Dissipation
(TJ max – TA)/θJA
Lead Temperature
JEDEC industry standard
Soldering
J-STD-020
ESD (Human Body Model)
2 kV
1
Power dissipated on chip must be derated to keep the junction temperature
below 125°C, assuming that the maximum power dissipation condition is
sourcing 24 mA into GND from IOUT with a 4 mA on-chip current.
2
Thermal impedance simulated values are based on JEDEC 2S2P thermal test
board with thermal vias. See JEDEC JESD51.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
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