參數(shù)資料
型號: AD5428YRUZ
廠商: Analog Devices Inc
文件頁數(shù): 32/33頁
文件大小: 0K
描述: IC DAC 8BIT DUAL MULT 20TSSOP
產(chǎn)品培訓模塊: Data Converter Fundamentals
DAC Architectures
標準包裝: 75
設置時間: 30ns
位數(shù): 8
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 單電源
功率耗散(最大): 3.3µW
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應商設備封裝: 20-TSSOP
包裝: 管件
輸出數(shù)目和類型: 2 電流,單極;2 電流,雙極
采樣率(每秒): 21.3M
產(chǎn)品目錄頁面: 782 (CN2011-ZH PDF)
Data Sheet
AD5428/AD5440/AD5447
Rev. C | Page 7 of 32
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
04462-004
R/W
CS
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
IOUTA
RFBA
VREFA
DB7
DAC A/B
DGND
AGND
RFBB
VREFB
VDD
DB0 (LSB)
DB4
DB5
DB6
DB3
DB2
DB1
IOUTB
AD5428
TOP VIEW
(Not to Scale)
Figure 4. Pin Configuration 20-Lead TSSOP (RU-20)
Table 4. AD5428 Pin Function Descriptions
Pin No.
Mnemonic
Description
1
AGND
DAC Ground Pin. This pin should typically be tied to the analog ground of the system, but can be biased to
achieve single-supply operation.
2, 20
IOUTA, IOUTB
DAC Current Outputs.
3, 19
RFBA, RFBB
DAC Feedback Resistor Pins. These pins establish voltage output for the DAC by connecting to an external
amplifier output.
4, 18
VREFA, VREFB
DAC Reference Voltage Input Terminals.
5
DGND
Digital Ground Pin.
6
DAC A/B
Selects DAC A or DAC B. Low selects DAC A; high selects DAC B.
7 to14
DB7 to DB0
Parallel Data Bits 7 Through 0.
15
CS
Chip Select Input. Active low. Used in conjunction with R/W to load parallel data to the input latch or to read
data from the DAC register.
16
R/W
Read/Write. When low, used in conjunction with CS to load parallel data. When high, used in conjunction
with CS to read back contents of the DAC register.
17
VDD
Positive Power Supply Input. This part can be operated from a supply of 2.5 V to 5.5 V.
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