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參數(shù)資料
| 型號： | AD5446YRMZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 7/29頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 14BIT MULTIPLYING 10-MSOP |
| 產(chǎn)品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 設(shè)計資源： | Versatile High Precision Programmable Current Sources Using DACs, Op Amps, and MOSFET Transistors (CN0151) |
| 標準包裝： | 50 |
| 位數(shù)： | 14 |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 50.5µW |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-MSOP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 2 電流，單極；2 電流，雙極 |
| 采樣率（每秒）： | 2.7M |
| 產(chǎn)品目錄頁面： | 782 (CN2011-ZH PDF) |
| 配用： | EVAL-AD5446EBZ-ND - BOARD EVALUATION FOR AD5446 |
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AD5444/AD5446
Data Sheet
Rev. E | Page 14 of 28
TERMINOLOGY
Relative Accuracy or Integral Nonlinearity
Relative accuracy or integral nonlinearity is a measure of the
maximum deviation from a straight line passing through the
endpoints of the DAC transfer function. It is measured after
adjusting for zero scale and full scale and is normally expressed
in LSBs or as a percentage of full-scale reading.
Differential Nonlinearity
Differential nonlinearity is the difference between the measured
change and the ideal 1 LSB change between any two adjacent
codes. A specified differential nonlinearity of 1 LSB maximum
over the operating temperature range ensures monotonicity.
Gain Error
Gain error or full-scale error is a measure of the output error
between an ideal DAC and the actual device output. For this
DAC, ideal maximum output is VREF 1 LSB. Gain error of the
DAC is adjustable to zero with external resistance.
Output Leakage Current
Output leakage current is current that flows in the DAC ladder
switches when the ladder is turned off. For the IOUT1 line, it can
be measured by loading all 0s to the DAC and measuring the
IOUT1 current. Minimum current flows in the IOUT2 line when
the DAC is loaded with all 1s.
Output Capacitance
Capacitance from IOUT1 or IOUT2 to AGND.
Output Current Settling Time
The amount of time it takes for the output to settle to a speci-
fied level for a full-scale input change. For this device, it is
specified with a 100 resistor to ground. The settling time
specification includes the digital delay from the SYNC rising
edge to the full-scale output change.
Digital-to-Analog Glitch Impulse
The amount of charge injected from the digital inputs to the
analog output when the inputs change state. This is normally
specified as the area of the glitch in either picoamps per second
or nanovolts per second, depending upon whether the glitch is
measured as a current or voltage signal.
Digital Feedthrough
When the device is not selected, high frequency logic activ-
ity on the device’s digital inputs can be capacitively coupled
through the device to show up as noise on the IOUT1 and IOUT2
pins and, subsequently, into the following circuitry. This noise is
digital feedthrough.
Multiplying Feedthrough Error
Multiplying feedthrough error is due to capacitive feedthrough
from the DAC reference input to the DAC IOUT1 line, when all
0s are loaded to the DAC.
Total Harmonic Distortion (THD)
The DAC is driven by an ac reference. The ratio of the rms sum
of the harmonics of the DAC output to the fundamental value is
the THD. Usually only the lower-order harmonics, such as second
to fifth, are included.
1
5
4
3
2
V
THD
2
log
20
+
=
Digital Intermodulation Distortion
Second-order intermodulation (IMD) measurements are the
relative magnitudes of the fa and fb tones digitally generated by
the DAC and the second-order products at 2fa fb and 2fb fa.
Compliance Voltage Range
The maximum range of (output) terminal voltage for which
the device provides the specified characteristics.
Spurious-Free Dynamic Range (SFDR)
The usable dynamic range of a DAC before spurious noise
interferes or distorts the fundamental signal. SFDR is the
measure of difference in amplitude between the fundamental
and the largest harmonically or nonharmonically related spur
from dc to full Nyquist bandwidth (half the DAC sampling
rate or fS/2). Narrow-band SFDR is a measure of SFDR over
an arbitrary window size, in this case 50% of the fundamental.
Digital SFDR is a measure of the usable dynamic range of the
DAC when the signal is a digitally generated sine wave.
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| AD5446YRMZ-RL7 | 功能描述:IC DAC 14BIT SRL 10MSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓模塊:LTC263x 12-, 10-, and 8-Bit VOUT DAC Family 特色產(chǎn)品:LTC2636 - Octal 12-/10-/8-Bit SPI VOUT DACs with 10ppm/°C Reference 標準包裝:91 系列:- 設(shè)置時間:4µs 位數(shù):10 數(shù)據(jù)接口:MICROWIRE?，串行，SPI? 轉(zhuǎn)換器數(shù)目:8 電壓電源:單電源 功率耗散（最大）:2.7mW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-WFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:14-DFN-EP（4x3） 包裝:管件 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
| AD5447 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual 8-,10-,12-Bit High Bandwidth Multiplying DACs with Serial Interface |
| AD5447YRU | 功能描述:IC DAC 12BIT DUAL MULT 24-TSSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標準包裝:47 系列:- 設(shè)置時間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:55µW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類型:1 電流，單極；1 電流，雙極 采樣率（每秒）:* |
| AD5447YRU-REEL | 功能描述:IC DAC 12BIT DUAL MULT 24-TSSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓模塊:LTC263x 12-, 10-, and 8-Bit VOUT DAC Family 特色產(chǎn)品:LTC2636 - Octal 12-/10-/8-Bit SPI VOUT DACs with 10ppm/°C Reference 標準包裝:91 系列:- 設(shè)置時間:4µs 位數(shù):10 數(shù)據(jù)接口:MICROWIRE?，串行，SPI? 轉(zhuǎn)換器數(shù)目:8 電壓電源:單電源 功率耗散（最大）:2.7mW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-WFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:14-DFN-EP（4x3） 包裝:管件 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
| AD5447YRU-REEL7 | 制造商:Analog Devices 功能描述:DAC 2-CH R-2R 12-bit 24-Pin TSSOP T/R 制造商:Analog Devices 功能描述:DAC 2CH R-2R 12-BIT 24TSSOP - Tape and Reel |
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