參數(shù)資料
型號: AD5453
廠商: Analog Devices, Inc.
英文描述: 8/10/12/14-Bit High Bandwidth Multiplying DACs with Serial Interface
中文描述: 8/10/12/14-Bit高帶寬倍增DAC的串行接口
文件頁數(shù): 12/16頁
文件大?。?/td> 125K
代理商: AD5453
12
REV. PrD
AD5450/AD5451/AD5452/AD5453
PRELIMINARY TECHNICAL DATA
C IR C UIT OP E R A T ION
Unipolar Mode
Using a single op amp, these devices can easily be
configured to provide 2 quadrant multiplying operation or
a unipolar output voltage swing as shown in Figure 3.
When an output amplifier is connected in unipolar mode,
the output voltage is given by:
V
OUT
= -D/2
n
x V
REF
Where D is the fractional representation of the digital
word loaded to the DAC, and n is the number of bits.
D = 0 to 255 (8-Bit AD5450)
= 0 to 1023 (10-Bit AD5451)
= 0 to 4095 (12-Bit AD5452)
= 0 to 16383 (14-Bit AD5453)
Note that the output voltage polarity is opposite to the
V
REF
polarity for dc reference voltages.
V
OUT
= 0 to -VREF
SCLK SDIN
V
DD
GND
V
REF
SYNC
IOUT1
RFB
V
DD
V
REF
uController
AGND
AD5450/1/2/3
NOTES:
R1 AND R2 USED ONLY IF GAIN ADJUSTMENT IS REQUIRED.
2
C1 PHASE COMPENSATION (1pF - 5pF) MAY BE REQUIRED
IF A1 IS A HIGH SPEED AMPLIFIER.
R
1
R
2
C
1
A1
Figure 3. Unipolar Operation
T hese DACs are designed to operate with either negative
or positive reference voltages. T he V
DD
power pin is only
used by the internal digital logic to drive the DAC
switches’ ON and OFF states.
T hese DACs are also designed to accommodate ac refer-
ence input signals in the range of -10V to +10V.
With a fixed 10 V reference, the circuit shown above will
give an unipolar 0V to -10V output voltage swing. When
V
IN
is an ac signal, the circuit performs two-quadrant
multiplication.
T he following table shows the relationship between digital
code and expected output voltage for unipolar operation.
(AD5450, 8-Bit device).
T able I. Unipolar Code T able
Digital Input
Analog Output (V)
1111 1111
1000 0000
0000 0001
0000 0000
-V
REF
(255/256)
-V
REF
(128/256) = -V
REF
/2
-V
REF
(1/256)
-V
REF
(0/256) = 0
Bipolar Operation
In some applications, it may be necessary to generate full
4-Quadrant multplying operation or a bipolar output
swing. T his can be easily accomplished by using another
external amplifier and some external resistors as shown in
Figure 4. In this circuit, the second amplifier A2 provides
a gain of 2. Biasing the external amplifier with an offset
from the reference voltage results in full 4-quadrant
multiplying operation. T he transfer function of this circuit
shows that both negative and positive output voltages are
created as the input data (D) is incremented from code
zero (V
OUT
= - V
REF
) to midscale (V
OUT
- 0V ) to full
scale (V
OUT
= + V
REF
).
V
OUT
= (V
REF
x D /
2
n-1
)
-
V
REF
Where D is the fractional representation of the digital
word loaded to the DAC and n is the resolution of the
D AC .
D = 0 to 255 (8-Bit AD5450)
= 0 to 1023 (10-Bit AD5451)
= 0 to 4095 (12-Bit AD5452)
= 0 to 16383 (14-Bit AD5453)
When V
IN
is an ac signal, the circuit performs four-
quadrant multiplication.
T able II. shows the relationship between digital code and
the expected output voltage for bipolar operation
(AD5450, 8-Bit device).
Figure 4. Bipolar Operation (4 Quadrant Multiplication)
V
OUT
SCLK SDIN
V
DD
V
REF
± 10V
SYNC
GND
IOUT1
RFB
V
DD
V
REF
uController
NOTES:
1
R1 AND R2 ARE USED ONLY IF GAIN ADJUSTMENT IS REQUIRED.
ADJUST R1 FOR V
= 0V WITH CODE 10000000 LOADED TO DAC.
2
MATCHING AND TRACKING IS ESSENTIAL FOR RESISTOR PAIRS
R3 AND R4.
3
C1 PHASE COMPENSATION (1pF-5pF) MAY BE REQUIRED
IF A1/A2 IS A HIGH SPEED AMPLIFIER.
R4
10k
R5
20k
AGND
= -VREF to +VREF
R3
20k
AD5450/1/2/3
R1
R2
C1
A1
A2
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