參數(shù)資料
型號(hào): AD5501BRUZ
廠商: Analog Devices Inc
文件頁數(shù): 4/20頁
文件大?。?/td> 0K
描述: IC DAC 12BIT SPI 16-TSSOP
產(chǎn)品培訓(xùn)模塊: DAC Architectures
標(biāo)準(zhǔn)包裝: 96
設(shè)置時(shí)間: 45µs
位數(shù): 12
數(shù)據(jù)接口: SPI?、QSPI?、MICROWIRE? 和 DSP
轉(zhuǎn)換器數(shù)目: 1
電壓電源:
工作溫度: -40°C ~ 105°C
安裝類型: *
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: *
包裝: 管件
輸出數(shù)目和類型: 1 電壓,單極
采樣率(每秒): *
AD5501
Data Sheet
Rev. C | Page 12 of 20
TERMINOLOGY
Relative Accuracy (Integral Nonlinearity)
For the DAC, relative accuracy, or integral nonlinearity (INL), is
a measure of the maximum deviation in LSBs from a straight line
passing through the endpoints of the DAC transfer function.
Differential Nonlinearity
Differential nonlinearity (DNL) is the difference between the
measured change and the ideal 1 LSB change between any two
adjacent codes. A specified differential nonlinearity of ±1 LSB
maximum ensures monotonicity. This DAC is guaranteed
monotonic by design.
Zero-Code Error
Zero-code error is a measure of the output error when zero code
(0x000) is loaded into the DAC register. Ideally, the output
should be 0 V. The zero-code error is always positive in the
AD5501 because the output of the DAC cannot go below 0 V
due to a combination of the offset errors in the DAC and the
output amplifier. Zero-code error is expressed in millivolts.
Zero-Code Error Drift
Zero-code error drift is a measure of the change in zero-code error
with a change in temperature expressed in μV/°C.
Offset Error
A measure of the difference between VOUT (actual) and VOUT (ideal)
expressed in millivolts in the linear region of the transfer function.
Offset error is measured on the AD5501 with Code 32 loaded in
the DAC registers for 60 V mode and with Code 64 loaded in
the DAC registers for 30 V mode. Offset error is expressed in
millivolts.
Offset Error Drift
Offset error drift is a measure of the change in offset error with
a change in temperature. It is expressed in μV/°C.
Full-Scale Error
Full-scale error is a measure of the output error when full-scale
code (0xFFF) is loaded into the DAC register expressed in
millivolts.
Full-Scale Error Drift
Full-scale error drift is a measure of the change in full-scale
error with a change in temperature. It is expressed in μV/°C.
Gain Error
Gain error is a measure of the span error of the DAC. It is the
deviation in slope of the DAC transfer characteristic from the
ideal, expressed as a percentage of the full-scale range.
Gain Temperature Coefficient
The gain temperature coefficient is a measure of the change in
gain with changes in temperature. It is expressed in (ppm of
full-scale range)/°C.
Digital-to-Analog Glitch Impulse
Digital-to-analog glitch impulse is the impulse injected into the
analog output when the input code in the DAC register changes
state. It is normally specified as the area of the glitch in nV-s
and is measured when the digital input code is changed by
1 LSB at the major carry transition.
DC Power Supply Rejection Ratio (PSRR)
PSRR indicates how the output of the DAC is affected by changes
in the supply voltage. PSRR is the ratio of the change in VOUT to
a change in VDD for full-scale output of the DAC. It is measured
in decibels. VDD is dc varied ±10%.
AC Power Supply Rejection Ratio (PSRR)
PSRR indicates how the output of the DAC is affected by changes
in the supply voltage. PSRR is the ratio of the change in VOUT to
a change in VDD for full-scale output of the DAC. It is measured
in decibels. VDD is ac varied ±10%.
Digital Feedthrough
Digital feedthrough is a measure of the impulse injected into
the analog output of the DAC from the digital input pins of the
device but is measured when the DAC is not being written to
(SYNC held high). It is specified in nV-s and measured with a
full-scale change on the digital input pins, that is, from all 0s to
all 1s or vice versa.
Capacitive Load Stability
Capacitive load stability refers to the ability of the amplifier to
drive a capacitive load. An amplifier output is considered stable
if any overshoot or ringing has stopped before approximately
1.5 times the settling time of the DAC has elapsed.
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