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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | AD5547BRU |
| 寤犲晢锛� | Analog Devices Inc |
| 鏂囦欢闋佹暩(sh霉)锛� | 8/20闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC DAC 16BIT DUAL 38-TSSOP |
| 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� | Data Converter Fundamentals DAC Architectures |
| 瑷�(sh猫)瑷堣硣婧愶細 | Precision, Unipolar, Inverting Conversion Using AD5547/57 DAC (CN0026) Precision, Unipolar, Noninverting Configuration for the AD5547/57 DAC (CN0027) Precision, Bipolar, Configuration for AD5547/AD5557 DAC (CN0028) |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 1 |
| 瑷�(sh猫)缃檪闁擄細 | 500ns |
| 浣嶆暩(sh霉)锛� | 16 |
| 鏁�(sh霉)鎿�(j霉)鎺ュ彛锛� | 骞惰伅(li谩n) |
| 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩細 | 2 |
| 闆诲闆绘簮锛� | 鍠浕婧� |
| 鍔熺巼鑰楁暎锛堟渶澶э級锛� | 55µW |
| 宸ヤ綔婧害锛� | -40°C ~ 125°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 38-TFSOP锛�0.173"锛�4.40mm 瀵級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 38-TSSOP |
| 鍖呰锛� | 绠′欢 |
| 杓稿嚭鏁�(sh霉)鐩拰椤炲瀷锛� | 2 闆绘祦锛屽柈妤�锛�2 闆绘祦锛岄洐妤� |
| 閲囨ǎ鐜囷紙姣忕锛夛細 | 2M |
绗�1闋�绗�2闋�绗�3闋�绗�4闋�绗�5闋�绗�6闋�绗�7闋�鐣�(d膩ng)鍓嶇8闋�绗�9闋�绗�10闋�绗�11闋�绗�12闋�绗�13闋�绗�14闋�绗�15闋�绗�16闋�绗�17闋�绗�18闋�绗�19闋�绗�20闋�
AD5547/AD5557
Data Sheet
Rev. D | Page 16 of 20
BIPOLAR MODE
4-Quadrant Multiplying Mode, VOUT = 鈥揤REF to +VREF
The AD5547/AD5557 contain on-chip all the 4-quadrant
resistors necessary for precision bipolar multiplying operation.
Such a feature minimizes the number of exponent components
to only a voltage reference, dual op amp, and compensation
capacitor (see Figure 23). For example, with a +10 V reference,
the circuit yields a precision, bipolar 鈥�10 V to +10 V output.
(5)
(6)
Table 9 shows some of the results for the 16-bit AD5547.
Table 9. AD5547 Output vs. Code
D in Binary
V
OUT
1111 1111 1111 1111
+V
REF (32,767/32,768)
1000 0000 0000 0001
+V
REF (1/32,768)
1000 0000 0000 0000
0
0111 1111 1111 1111
鈥揤
REF (1/32,768)
0000 0000 0000 0000
鈥揤
REF
WR
RS
C6 0.1F
C7 1F
2
+10V
鈥�10V
鈥�15V
鈥�10V TO +10V
+15V
04452-
006
AD8512
AD5547/AD5557
C8
U2A
R1A
16/14 DATA
VDD
RCOMA
R2
U1
R1
ROFSA
RFBA
C9
RFB
ROFS
MSB
A0, A1
IOUTA
AGNDA
U2B
C4 1F
C1
1F
C2
0.1F
C3
0.1F
C5 0.1F
VOUT
VREFA
MSB
A0, A1
LDAC
+V
鈥揤
GND
ADR01
4
VOUT
TRIM
5
6
VIN
U3
2
+15V
+5V
16-/14-BIT
DAC A
Figure 23. 4-Quadrant Multiplying Mode, VOUT = 鈥揤REF to +VREF
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鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| AD5547BRU-REEL7 | 鍒堕€犲晢:Rochester Electronics LLC 鍔熻兘鎻忚堪:- Tape and Reel |
| AD5547BRUZ | 鍔熻兘鎻忚堪:IC DAC 16BIT DUAL 38-TSSOP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 鏁�(sh霉)妯¤綁(zhu菐n)鎻涘櫒 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:50 绯诲垪:- 瑷�(sh猫)缃檪闁�:4µs 浣嶆暩(sh霉):12 鏁�(sh霉)鎿�(j霉)鎺ュ彛:涓茶 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩�:2 闆诲闆绘簮:鍠浕婧� 鍔熺巼鑰楁暎锛堟渶澶э級:- 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:8-TSSOP锛�8-MSOP锛�0.118"锛�3.00mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:8-uMAX 鍖呰:绠′欢 杓稿嚭鏁�(sh霉)鐩拰椤炲瀷:2 闆诲锛屽柈妤� 閲囨ǎ鐜囷紙姣忕锛�:* 鐢�(ch菐n)鍝佺洰閷勯爜闈�:1398 (CN2011-ZH PDF) |
| AD5547CRUZ | 鍔熻兘鎻忚堪:IC DAC 16BIT PAR DUAL 38TSSOP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 鏁�(sh霉)妯¤綁(zhu菐n)鎻涘櫒 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:50 绯诲垪:- 瑷�(sh猫)缃檪闁�:4µs 浣嶆暩(sh霉):12 鏁�(sh霉)鎿�(j霉)鎺ュ彛:涓茶 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩�:2 闆诲闆绘簮:鍠浕婧� 鍔熺巼鑰楁暎锛堟渶澶э級:- 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:8-TSSOP锛�8-MSOP锛�0.118"锛�3.00mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:8-uMAX 鍖呰:绠′欢 杓稿嚭鏁�(sh霉)鐩拰椤炲瀷:2 闆诲锛屽柈妤� 閲囨ǎ鐜囷紙姣忕锛�:* 鐢�(ch菐n)鍝佺洰閷勯爜闈�:1398 (CN2011-ZH PDF) |
| AD5547CRUZ-REEL7 | 鍔熻兘鎻忚堪:IC DAC 16BIT PAR DUAL 38TSSOP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 鏁�(sh霉)妯¤綁(zhu菐n)鎻涘櫒 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Data Converter Fundamentals DAC Architectures 妯�(bi膩o)婧�(zh菙n)鍖呰:750 绯诲垪:- 瑷�(sh猫)缃檪闁�:7µs 浣嶆暩(sh霉):16 鏁�(sh霉)鎿�(j霉)鎺ュ彛:骞惰伅(li谩n) 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩�:1 闆诲闆绘簮:闆� ± 鍔熺巼鑰楁暎锛堟渶澶э級:100mW 宸ヤ綔婧害:0°C ~ 70°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:28-LCC锛圝 褰㈠紩绶氾級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:28-PLCC锛�11.51x11.51锛� 鍖呰:甯跺嵎 (TR) 杓稿嚭鏁�(sh霉)鐩拰椤炲瀷:1 闆诲锛屽柈妤�锛�1 闆诲锛岄洐妤� 閲囨ǎ鐜囷紙姣忕锛�:143k |
| AD5547-EP | 鍒堕€犲晢:AD 鍒堕€犲晢鍏ㄧū:Analog Devices 鍔熻兘鎻忚堪:Dual-Current Output, Parallel Input |
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