參數(shù)資料
型號: AD5555CRUZ
廠商: Analog Devices Inc
文件頁數(shù): 24/24頁
文件大?。?/td> 0K
描述: IC DAC 14BIT DUAL SRL IN 16TSSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標準包裝: 1
設(shè)置時間: 500ns
位數(shù): 14
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 單電源
功率耗散(最大): 55µW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 管件
輸出數(shù)目和類型: 2 電流,單極;2 電流,雙極
采樣率(每秒): 2M
產(chǎn)品目錄頁面: 783 (CN2011-ZH PDF)
Data Sheet
AD5545/AD5555
Rev. G | Page 9 of 24
THEORY OF OPERATION
The AD5545/AD5555 contain a 16-/14-bit, current-output,
digital-to-analog converter, a serial-input register, and a DAC
register. Both parts require a minimum of a 3-wire serial data
interface with an additional LDAC for dual channel simultaneous
update.
DIGITAL-TO-ANALOG CONVERTER
The DAC architecture uses a current-steering R-2R ladder
design. Figure 17 shows the typical equivalent DAC. The DAC
contains a matching feedback resistor for use with an external
I-to-V converter amplifier. The RFB pin is connected to the
output of the external amplifier. The IOUT terminal is connected
to the inverting input of the external amplifier. These DACs are
designed to operate with either negative or positive reference
voltages. The VDD power pin is used only by the logic to drive
the DAC switches on and off. Note that a matching switch is
used in series with the internal 5 k feedback resistor. If users
attempt to measure the RFB value, power must be applied to VDD
to achieve continuity. The VREF input voltage and the digital data
(D) loaded into the corresponding DAC register, according to
Equation 1 and Equation 2, determine the DAC output voltage.
536
,
65
/
D
V
REF
OUT
×
=
(1)
384
,
16
/
D
V
REF
OUT
×
=
(2)
Note that the output full-scale polarity is the opposite of the
VREF polarity for dc reference voltages.
VREF
DIGITAL INTERFACE CONNECTIONS OMITTED FOR CLARITY:
SWITCHES S1 AND S2 ARE CLOSED, VDD MUST BE POWERED
R
2R
R
5k
S2
S1
R
VDD
RFB
IOUT
GND
02918- 0- 005
Figure 17. Equivalent R-2R DAC Circuit
These DACs are also designed to accommodate ac reference input
signals. The AD5545/AD5555 accommodate input reference
voltages in the range of –12 V to +12 V. The reference voltage
inputs exhibit a constant nominal input-resistance value of
5 k, ±30%. The DAC output (IOUT) is code dependent, pro-
ducing various output resistances and capacitances. When
choosing an external amplifier, the user should take into
account the variation in impedance generated by the AD5545/
AD5555 on the amplifiers inverting input node. The feedback
resistance in parallel with the DAC ladder resistance dominates
output voltage noise.
VREFA
DIGITAL INTERFACE CONNECTIONS OMITTED FOR CLARITY:
SWITCHES S1 AND S2 ARE CLOSED, VDD MUST BE POWERED
R
2R
R
5k
S2
S1
+3V
–3V
R
VOUT
VIN
VDD
5V
2.500V
RFBA
IOUTA
AGNDA
GND
02918- 0- 006
AD5545/AD5555
ADR03
AD8628
LOAD
VOUT
VEE
VCC
Figure 18. Recommended System Connections
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