參數(shù)資料
型號: AD561JD
廠商: Analog Devices Inc
文件頁數(shù): 1/8頁
文件大?。?/td> 0K
描述: IC DAC 10BIT 5-15V IN MONO 16DIP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 1
設(shè)置時間: 250ns
位數(shù): 10
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 雙 ±
工作溫度: 0°C ~ 70°C
安裝類型: 通孔
封裝/外殼: 16-CDIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 16-CDIP 側(cè)面銅焊
包裝: 管件
輸出數(shù)目和類型: 1 電流,單極;1 電流,雙極
采樣率(每秒): *
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
AD561
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
Analog Devices, Inc., 1997
Low Cost 10-Bit
Monolithic D/A Converter
FUNCTIONAL BLOCK DIAGRAM
TO-116
PRODUCT DESCRIPTION
The AD561 is an integrated circuit 10-bit digital-to-analog
converter combined with a high stability voltage reference
fabricated on a single monolithic chip. Using ten precision high-
speed current-steering switches, a control amplifier, voltage
reference, and laser-trimmed thin-film SiCr resistor network,
the device produces a fast, accurate analog output current.
Laser trimmed output application resistors are also included to
facilitate accurate, stable current-to-voltage conversion; they are
trimmed to 0.1% accuracy, thus eliminating external trimmers
in many situations.
Several important technologies combine to make the AD561 the
most accurate and most stable 10-bit DAC available. The low
temperature coefficient, high stability thin-film network is
trimmed at the wafer level by a fine resolution laser system to
0.01% typical linearity. This results in an accuracy specification
of
±1/4 LSB max for the K and T versions, and 1/2 LSB max
for the J and S versions.
The AD561 also incorporates a low noise, high stability
subsurface zener diode to produce a reference voltage with
excellent long term stability and temperature cycle characteris-
tics, which challenge the best discrete Zener references. A
temperature compensation circuit is laser-trimmed to allow
custom correction of the temperature coefficient of each device.
This results in a typical full-scale temperature coefficient of
15 ppm/
°C; the TC is tested and guaranteed to 30 ppm/°C max
for the K and T versions, 60 ppm/
°C max for the S, and
80 ppm/
°C for the J.
The AD561 is available in four performance grades. The
AD561J and K are specified for use over the 0
°C to +70°C
temperature range and are available in either a 16-pin
FEATURES
Complete Current Output Converter
High Stability Buried Zener Reference
Laser Trimmed to High Accuracy (1/4 LSB Max Error,
AD561K, T)
Trimmed Output Application Resistors for 0 V to +10 V,
5 V Ranges
Fast Settling – 250 ns to 1/2 LSB
Guaranteed Monotonicity Over Full Operating
Temperature Range
TTL/DTL and CMOS Compatible (Positive True Logic)
Single Chip Monolithic Construction
Available in Chip Form
MlL-STD-883-Compliant Versions Available
hermetically-sealed ceramic DIP or a 16-pin molded plastic
DIP. The AD561S and T grades are specified for the –55
°C to
+125
°C range and are available in the ceramic package.
PRODUCT HIGHLIGHTS
1. Advanced monolithic processing and laser trimming at the
wafer level have made the AD561 the most accurate 10-bit
converter available, while keeping costs consistent with large
volume integrated circuit production. The AD561K and T
have 1/4 LSB max relative accuracy and 1/2 LSB max
differential nonlinearity. The low TC R-2R ladder guaran-
tees that all AD561 units will be monotonic over the entire
operating temperature range.
2. Digital system interfacing is simplified by the use of a
positive true straight binary code. The digital input voltage
threshold is a function of the positive supply level; connect-
ing VCC to the digital logic supply automatically sets the
threshold to the proper level for the logic family being used.
Logic sink current requirement is only 25
A.
3. The high speed current steering switches are designed to settle
in less than 250 ns for the worst case digital code transition.
This allows construction of successive-approximation A/D
converters in the 3
s to 5 s range.
4. The AD561 has an output voltage compliance range from
–2 V to +10 V, allowing direct current-to-voltage conversion
with just an output resistor, omitting the op amp. The 40 M
open collector output impedance results in negligible errors
due to output leakage currents.
5. The AD561 is available in versions compliant with MIL-
STD-883. Refer to the Analog Devices Military Products
Databook or current AD561/883B data sheet for detailed
specifications.
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