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參數(shù)資料
| 型號(hào)： | AD561JD |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 4/8頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 10BIT 5-15V IN MONO 16DIP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 設(shè)置時(shí)間： | 250ns |
| 位數(shù)： | 10 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 雙 ± |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 16-CDIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 16-CDIP 側(cè)面銅焊 |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 1 電流，單極；1 電流，雙極 |
| 采樣率（每秒）： | * |
AD561
–4–
REV. A
THE AD561 OFFERS TRUE 10-BIT RESOLUTION OVER
FULL TEMPERATURE RANGE
Accuracy: Analog Devices defines accuracy as the maximum
deviation of the actual, adjusted DAC output (see page 5) from
the ideal analog output (a straight line drawn from 0 to FS – l
LSB) for any bit combination. The AD561 is laser trimmed to
1/4 LSB (0.025% of FS) maximum error at +25
°C for the K
and T versions – 1/2 LSB for the J and S.
Monotonicity: A DAC is said to be monotonic if the output
either increases or remains constant for increasing digital inputs
such that the output will always be a single-valued function of the
input. All versions of the AD561 are monotonic over their full
operating temperature range.
Differential Nonlinearity: Monotonic behavior requires that
the differential nonlinearity error be less than
1 LSB both at +25
°C and over the temperature range of
interest. Differential nonlinearity is the measure of the variation
in analog value, normalized to full scale, associated with a
1 LSB change in digital input code. For example, for a 10 volt
full scale output, a change of 1 LSB in digital input code should
result in a 9.8 mV change in the analog output (1 LSB = 10 V
× 1/1024 = 9.8 mV). If in actual use, however, a 1 LSB change
in the input code results in a change of only 2.45 mV (1/4 LSB)
in analog output, the differential nonlinearity error would be
7.35 mV, or 3/4 LSB The AD561K and T have a max differen-
tial linearity error of 1/2 LSB.
The differential nonlinearity temperature coefficient must also
be considered if the device is to remain monotonic over its full
operating temperature range. A differential nonlinearity tempera-
ture coefficient of 2.5 ppm/
°C could, under worst case condi-
tions for a temperature change of +25
°C to +125°C, add 0.025%
(100
2.5 ppm/
°C of error). The resulting error could then be
as much as 0.025% + 0.025% = 0.05% of FS (1/2 LSB represents
0.05% of FS). To be sure of accurate performance all versions of
the AD561 are therefore 100% tested to be monotonic over the
full operating temperature range.
Figure 1. Chip Bonding Diagram
CONNECTING THE AD561 FOR BUFFERED VOLTAGE
OUTPUT
The standard current-to-voltage conversion connections using
an operational amplifier are shown here with the preferred
trimming techniques. If a low offset operational amplifier
(AD510, AD741L, AD301AL) is used, excellent performance
can be obtained in many situations without trimming. (A 5 mV
op amp offset is equivalent to 1/2 LSB on a 10 volt scale.) If a
25
fixed resistor is substituted for the 50 trimmer, unipolar
zero will typically be within
±1/10 LSB (plus op amp offset),
and full scale accuracy will be within
±1 LSB. Substituting a
25
resistor for the 50 bipolar offset trimmer will give a
bipolar zero error typically within
±1 LSB.
The AD509 is recommended for buffered voltage-output
applications that require a settling time to
±1/2 LSB of one
microsecond. The feedback capacitor is shown with the
optimum value for each application; this capacitor is required to
compensate for the 25 picofarad DAC output capacitance.
ORDERING GUIDE
ACCURACY
GAIN T C
PACKAGE
MODEL1
TEMP RANGE
@ +25 C
(of FS/ C)
OPTION2
AD561JD
0
°C to +70°C
±1/2 LSB max
80 ppm max
D-16
AD561JN
0
°C to +70°C
±1/2 LSB max
80 ppm max
N-16
AD561KD
0
°C to +70°C
±1/4 LSB max
30 ppm max
D-16
AD561KN
0
°C to +70°C
±1/4 LSB max
30 ppm max
N-16
AD561SD
–55
°C to +125°C ±1/2 LSB max
60 ppm max
D-16
AD561TD
–55
°C to +125°C ±1/4 LSB max
30 ppm max
D-16
AD561/883B
–55
°C to +125°C*
*
NOTES
1For details on grade and package offerings screened in accordance with MIL-STD-883, refer to the
Analog Devices Military Products Databook or current AD561/883B data sheet.
2D = Ceramic DIP; N = Plastic DIP.
*Refer to AD561/883B military data sheet.
PIN CONFIGURATION
TOP VIEW
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| AD561JN | 制造商:Analog Devices 功能描述:DAC 1-CH R-2R 10-bit 16-Pin PDIP Tube 制造商:Analog Devices 功能描述:IC 10BIT DAC DIP16 561 |
| AD561JN/+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:10-Bit Digital-to-Analog Converter |
| AD561JNZ | 功能描述:IC DAC 10BIT MONO VOLT IN 16DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1,000 系列:- 設(shè)置時(shí)間:1µs 位數(shù):8 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:8 電壓電源:雙 ± 功率耗散（最大）:941mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC W 包裝:帶卷 (TR) 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
| AD561K | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Cost 10-Bit Monolithic D/A Converter |
| AD561KD | 功能描述:IC DAC 10BIT 5-15V IN MONO 16DIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1,000 系列:- 設(shè)置時(shí)間:1µs 位數(shù):8 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:8 電壓電源:雙 ± 功率耗散（最大）:941mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC W 包裝:帶卷 (TR) 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
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