VDD
參數(shù)資料
型號(hào): AD5662ARM-1
廠商: Analog Devices Inc
文件頁數(shù): 3/24頁
文件大?。?/td> 0K
描述: IC DAC 16BIT BUFF V-OUT 8-MSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
設(shè)計(jì)資源: 4 mA to 20 mA Process Control Loop Using AD5662 (CN0009)
16-Bit Fully Isolated Voltage Output Module Using AD5662, ADuM1401, and External Amplifiers (CN0063)
16-Bit Fully Isolated 4 mA to 20 mA Output Module Using AD5662, ADuM1401, and External Amplifiers (CN0064)
標(biāo)準(zhǔn)包裝: 50
系列: nanoDAC™
設(shè)置時(shí)間: 8µs
位數(shù): 16
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 8-MSOP
包裝: 管件
輸出數(shù)目和類型: 1 電壓,單極
AD5662
Rev. A | Page 11 of 24
04777-016
CH1 2.0V
CH2 500mV
M100
μs 125MS/s
A CH1
1.28V
8.0ns/pt
VDD = VREF = 5V
TA = 25°C
VOUT
VDD
1
2
MAX(C2)*
420.0mV
Figure 22. Power-On Reset to 0 V
04777-017
CH1 2.0V
CH2 1.0V
M100
μs 125MS/s
A CH1
1.28V
8.0ns/pt
VDD = VREF = 5V
TA = 25°C
VOUT
VDD
1
2
Figure 23. Power-On Reset to Midscale
04777-018
CH1 2.0V
CH2 1.0V
M1.0
μs 5.0gS/s
A CH2
2.16V
200ps/pt
VOUT
SCLK
1
2
Figure 24. Exiting Power-Down to Midscale
SAMPLE NUMBER
AMP
L
ITUDE
2.502500
2.502250
2.502000
2.501750
2.501500
2.501250
2.501000
2.500750
2.500500
2.500250
2.500000
2.499750
2.499500
2.499250
2.499000
2.498750
0
150 200
250
50
100
300
350
400
450
500 550
04777-005
VDD = VREF = 5V
TA = 25°C
13nS/SAMPLE NUMBER
1 LSB CHANGE AROUND
MIDSCALE (0x8000 TO 0x7FFF)
GLITCH IMPULSE = 2.723nV.s
Figure 25. Digital-to-Analog Glitch Impulse (Negative)
SAMPLE NUMBER
AMP
L
ITUDE
2.500400
2.500300
2.500200
2.500100
2.500000
2.499900
2.499800
2.499700
2.499600
2.499500
2.499400
2.499300
2.499200
2.499100
VDD = VREF = 5V
TA = 25°C
13nS/SAMPLE NUMBER
1 LSB CHANGE AROUND
MIDSCALE (0x7FFF TO 0x8000)
GLITCH IMPULSE = 1.271nV.s
0
150 200
250
50
100
300
350
400
450
500 550
04777-006
Figure 26. Digital-to-Analog Glitch Impulse (Positive)
SAMPLE NUMBER
AMP
L
ITUDE
2.500250
2.500200
2.500150
2.500100
2.500050
2.500000
2.499950
2.499900
2.499850
2.499800
2.499750
2.499700
2.499650
2.499600
0
150 200
250
50
100
300
350
400
450
500 550
04777-007
VDD = VREF = 5V
TA = 25°C
20nS/SAMPLE NUMBER
DAC LOADED WITH MIDSCALE
DIGITAL FEEDTHROUGH = 0.06nV.s
Figure 27. Digital Feedthrough
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