AD5722/AD5732/AD5752
Rev. D | Page 3 of 32
SPECIFICATIONS
AVDD = 4.5 V1 to 16.5 V; AVSS = 4.5 V1 to 16.5 V, or AVSS = 0 V; GND = 0 V; REFIN = 2.5 V; DVCC = 2.7 V to 5.5 V; RLOAD = 2 kΩ; CLOAD = 200 pF; all specifications TMIN to TMAX, unless otherwise noted.
Table 1.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
ACCURACY
Outputs unloaded
Resolution
AD5752
16
Bits
AD5732
14
Bits
AD5722
12
Bits
Total Unadjusted Error (TUE)
B Version
0.1
+0.1
% FSR
A Version
0.3
+0.3
% FSR
Integral Nonlinearity (INL)
2AD5752 A, B Versions
16
+16
LSB
AD5732 A Version
4
+4
LSB
AD5722 A Version
1
+1
LSB
Differential Nonlinearity (DNL)
1
+1
LSB
All models, all versions, guaranteed monotonic
Bipolar Zero Error
6
+6
mV
TA = 25°C, error at other temperatures obtained
using bipolar zero TC
±4
ppm FSR/°C
Zero-Scale Error
6
+6
mV
TA = 25°C, error at other temperatures obtained using
zero-scale TC
±4
ppm FSR/°C
Offset Error
6
+6
mV
TA = 25°C, error at other temperatures obtained using
zero-scale TC
Offset Error TC
±4
ppm FSR/°C
Gain Error
0.025
+0.025
% FSR
±10 V range, TA = 25°C, error at other temperatures
obtained using gain TC
0.065
0
+10 V and +5 V ranges, TA = 25°C, error at other
temperatures obtained using gain TC
0
+0.08
±5 V range, TA = 25°C, error at other temperatures
obtained using gain TC
±4
ppm FSR/°C
120
μV
Reference Input Voltage
2.5
V
±1% for specified performance
DC Input Impedance
1
5
MΩ
Input Current
2
±0.5
+2
μA
Reference Range
2
3
V
Output Voltage Range
10.8
+10.8
V
AVDD/AVSS = ±11.7 V min, REFIN = +2.5 V
12
+12
V
AVDD/AVSS = ±12.9 V min, REFIN = +3 V
Headroom Required
0.5
0.9
V
Output Voltage TC
±4
ppm FSR/°C
Output Voltage Drift vs. Time
±50
ppm FSR
Drift after 1000 hours of lifetest @ 125°C
Short-Circuit Current
20
mA
Load
2
kΩ
For specified performance
Capacitive Load Stability
4000
pF
DC Output Impedance
0.5
Ω