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| 型號(hào)： | AD5726YRWZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 7/20頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT QUAD SERIAL 16-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | iCMOS® |
| 設(shè)置時(shí)間： | 9µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 電壓電源： | 雙 ± |
| 功率耗散（最大）： | 30mW 單極；240mW 雙極 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC W |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 4 電壓，單極；4 電壓，雙極 |
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Data Sheet
AD5726
Rev. C | Page 15 of 20
APPLICATIONS INFORMATION
POWER-UP SEQUENCE
To prevent CMOS latch-up conditions, powering AVDD, AVSS,
and GND prior to any reference voltages is recommended. The
ideal power-up sequence is GND, AVSS, AVDD, VREFP, VREFN, and
the digital inputs. Noncompliance with the power-up sequence
over an extended period can elevate the reference currents and
eventually damage the device. On the other hand, if the non-
compliant power-up sequence condition is as short as a few
milliseconds, the device can resume normal operation without
damage once AVDD/AVSS are powered up.
REFERENCE CONFIGURATION
Output voltage ranges can be configured as either unipolar or
bipolar, and within these choices, a wide variety of options
exists. The unipolar configuration can be either a positive (as
shown in Figure 25) or a negative voltage output. The bipolar
configuration can be either symmetrical (as shown in Figure 26)
or nonsymmetrical.
06469-
023
ADR01
+15V
INPUT
OUTPUT
TRIM
10k
+10V OPERATION
+15V
AD5726
0.1F║10F
–15V
OP1177
AVDD
AVSS
VREFP
0.2F
VREFN
+
0.1F║10F
Figure 25. Unipolar +10 V Operation
06469-
024
0.2F
AD5726
+15V
–15V
AVDD
VREFP
VREFN
AVSS
BALANCE
100k
GAIN
100kΩ
4
6
12
5
13
8
3
1
14
15
7
6.2Ω
0.2F
6.2Ω
1F
39kΩ
AD688 FOR ±10V
AD588 FOR ±5V
±5 OR ±10V OPERATION
0.1F║10F
Figure 26. Symmetrical Bipolar Operation
configured for ±10 V operation. See the AD688 data sheet for a
full explanation of the reference operation.
Adjustments may not be necessary for many applications
because the AD688 is a very high accuracy reference. However,
if additional adjustments are required, adjust the AD5726 full-
scale first. Begin by loading the digital full-scale code (0xFFF).
Then, modify the gain adjust potentiometer to attain a DAC
output voltage of 9.9976 V. Next, alter the balance adjust to set
the midscale output voltage to 0.000 V.
The 0.2 F bypass capacitors shown at their reference inputs in
Figure 26 should be used whenever ±10 V references are used.
Applications with single references or references to ±5 V may
not require the 0.2 F bypassing. The 6.2 resistor in series
with the output of the reference amplifier keeps the amplifier
from oscillating with the capacitive load. This has been found
to be large enough to stabilize this circuit. Larger resistor values
are acceptable if the drop across the resistor does not exceed a VBE.
Assuming a minimum VBE of 0.6 V and a maximum current of
2.75 mA, the resistor should be under 200 for the loading of a
single AD5726.
Using two separate references is not recommended. Having two
references may cause different drifts with time and temperature,
whereas with a single reference, most drifts track.
Unipolar positive full-scale operation can usually be set by a
reference with the correct output voltage. This is preferable to
using a reference and dividing down to the required value. For a
+10 V full-scale output, the circuit can be configured as shown
in Figure 25. In this configuration, the full-scale value is first set
by adjusting the 10 kresistor for a full-scale output of 9.9976 V.
AD5726
0.2F
0V TO –10V OPERATION
U2
+15V
–15V
U1
ADR01
TEMP
GND
+15V
OP1177
V+
V–
VOUT
VIN
TRIM
AVDD
VREFP
VREFN
AVSS
06469-
025
0.1F║10F
Figure 27. Unipolar 10 V Operation
output that is connected directly to VREFPfor the reference voltage.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD5726YRWZ-REEL7 | 功能描述:IC DAC 12BIT QUAD SERIAL 16-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:iCMOS® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時(shí)間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁(yè)面:1398 (CN2011-ZH PDF) |
| AD572AD | 制造商:Analog Devices 功能描述: 制造商:Rochester Electronics LLC 功能描述:12-BIT ADC IC - Bulk 制造商:AD 功能描述:_ |
| AD572B | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-BIT SUCCESSIVE APPROXIMATION INTEGRATED CIRCUIT A/D CONVERTER |
| AD572BD | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD572S | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-BIT SUCCESSIVE APPROXIMATION INTEGRATED CIRCUIT A/D CONVERTER |
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