- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1979 > AD5752AREZ (Analog Devices Inc)IC DAC DUAL 16BIT SERIAL 24TSSOP PDF資料下載
參數(shù)資料
| 型號(hào)： | AD5752AREZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 21/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC DUAL 16BIT SERIAL 24TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 設(shè)計(jì)資源： | Software Configurable 16-Bit Dual-Channel Unipolar/Bipolar Voltage Output Using AD5752 (CN0092) |
| 標(biāo)準(zhǔn)包裝： | 62 |
| 設(shè)置時(shí)間： | 10µs |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 功率耗散（最大）： | 190mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm）裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 24-TSSOP 裸露焊盤 |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 2 電壓，單極；2 電壓，雙極 |
| 采樣率（每秒）： | * |
| 產(chǎn)品目錄頁面： | 784 (CN2011-ZH PDF) |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁當(dāng)前第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁
AD5722/AD5732/AD5752
Rev. D | Page 28 of 32
APPLICATIONS INFORMATION
+5 V/±5 V OPERATION
When operating from a single +5 V supply or a dual ±5 V supply,
an output range of +5 V or ±5 V is not achievable because suffi-
cient headroom for the output amplifier is not available. In this
situation, a reduced reference voltage can be used. For example,
a 2 V reference voltage produces an output range of +4 V or ±4 V,
and the 1 V of headroom is more than enough for full operation.
A standard value voltage reference of 2.048 V can be used to
produce output ranges of +4.096 V and ±4.096 V.
LAYOUT GUIDELINES
In any circuit where accuracy is important, careful consideration
of the power supply and ground return layout helps to ensure
the rated performance. The printed circuit board on which the
AD5722/AD5732/AD5752 are mounted should be designed so
that the analog and digital sections are separated and confined
to certain areas of the board. If the AD5722/AD5732/AD5752
are in a system where multiple devices require an AGND-to-
DGND connection, the connection should be made at one
point only. The star ground point should be established as close
as possible to the device.
The AD5722/AD5732/AD5752 should have ample supply bypass-
ing of a 10 μF capacitor in parallel with a 0.1 μF capacitor on
each supply located as close to the package as possible, ideally
right up against the device. The 10 μF capacitor is the tantalum
bead type. The 0.1 μF capacitor should have low effective series
resistance (ESR) and low effective series inductance (ESI) such
as the common ceramic types, which provide a low impedance
path to ground at high frequencies to handle transient currents
due to internal logic switching.
The power supply lines of the AD5722/AD5732/AD5752 should
use as large a trace as possible to provide low impedance paths
and reduce the effects of glitches on the power supply line. Fast
switching signals, such as a data clock, should be shielded with
digital ground to avoid radiating noise to other parts of the
board, and they should never be run near the reference inputs.
A ground line routed between the SDIN and SCLK lines helps
reduce crosstalk between them (this is not required on a
multilayer board that has a separate ground plane, but separating
the lines does help). It is essential to minimize noise on the
REFIN line because any unwanted signals can couple through
to the DAC outputs.
Avoid crossover of digital and analog signals. Traces on
opposite sides of the board should run at right angles to each
other. This reduces the effects of feedthrough on the board. A
microstrip technique is by far the best method, but it is not
always possible with a double-sided board. In this technique,
the component side of the board is dedicated to a ground plane,
and signal traces are placed on the solder side.
GALVANICALLY ISOLATED INTERFACE
In many process control applications, it is necessary to provide
an isolation barrier between the controller and the unit being
controlled to protect and isolate the controlling circuitry from
any hazardous common-mode voltages that may occur. The
i
Coupler family of products from Analog Devices, Inc., provides
voltage isolation in excess of 2.5 kV. The serial loading structure
of the AD5722/AD5732/AD5752 makes them ideal for isolated
interfaces because the number of interface lines is kept to a
minimum. Figure 43 shows a 4-channel isolated interface to the
AD5722/AD5732/AD5752 using an ADuM1400. For further
information, visit http://www.analog.com/icouplers.
ENCODE
DECODE
ENCODE
DECODE
ENCODE
DECODE
VIA
VIB
VIC
VID
VOA
VOB
VOC
VOD
ENCODE
DECODE
ADuM1400*
MICROCONTROLLER
SERIAL CLOCK OUT
SERIAL DATA OUT
SYNC OUT
CONTROL OUT
TO SCLK
TO SDIN
TO SYNC
TO LDAC
*ADDITIONAL PINS OMITTED FOR CLARITY.
0
646
7-
0
11
Figure 43. Isolated Interface
VOLTAGE REFERENCE SELECTION
To achieve optimum performance from the AD5722/AD5732/
AD5752 over their full operating temperature range, a precision
voltage reference must be used. Thought should be given to the
selection of a precision voltage reference. The voltage applied to
the reference inputs is used to provide a buffered positive and
negative reference for the DAC cores. Therefore, any error in
the voltage reference is reflected in the outputs of the device.
There are four possible sources of error to consider when
choosing a voltage reference for high accuracy applications:
initial accuracy, temperature coefficient of the output voltage,
long-term drift, and output voltage noise.
Initial accuracy error on the output voltage of an external
reference can lead to a full-scale error in the DAC. To
minimize these errors, a reference with low initial accuracy
error specification is preferred. Choosing a reference with
an output trim adjustment, such as the ADR421, allows a
system designer to trim out system errors by setting the
reference voltage to a voltage other than the nominal. The
trim adjustment can also be used to trim out temperature-
induced errors.
The temperature coefficient of a reference output voltage
affects INL, DNL, and TUE. A reference with a tight
temperature coefficient specification should be chosen to
reduce the dependence of the DAC output voltage on
ambient conditions.
Long-term drift is a measure of how much the reference
output voltage drifts over time. A reference with a tight
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD5752RBREZ-REEL7 | IC DAC DUAL 16BIT SERIAL 24TSSOP |
| AD5754BREZ-REEL7 | IC DAC 16BIT DSP/SRL 24TSSOP |
| AD5755-1ACPZ | IC DAC 16BIT SERIAL 64LFCSP |
| AD5755BCPZ-REEL7 | IC DAC 16BIT QUAD 64-LFCSP |
| AD5760BCPZ | IC DAC VOLT OUT 16BIT 24LFCSP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD5752AREZ-REEL7 | 功能描述:IC DAC DUAL 16BIT SERIAL 24TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:47 系列:- 設(shè)置時(shí)間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:55µW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類型:1 電流，單極；1 電流，雙極 采樣率（每秒）:* |
| AD5752BREZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:Complete, Dual, 12-/14-/16-Bit, Serial Input, Unipolar/Bipolar, Voltage Output DACs |
| AD5752BREZ-REEL7 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Complete, Dual, 12-/14-/16-Bit, Serial Input, Unipolar/Bipolar, Voltage Output DACs |
| AD5752R | 制造商:AD 制造商全稱:Analog Devices 功能描述:Complete, Dual, 12-/14-/16-Bit, Serial Input, Unipolar/Bipolar, Voltage Output DACs |
| AD5752RBREZ | 功能描述:IC DAC DUAL 16BIT SERIAL 24TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時(shí)間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁面:1398 (CN2011-ZH PDF) |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。