參數(shù)資料
型號: AD648KRZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 3/12頁
文件大?。?/td> 0K
描述: IC OPAMP BIFET 1MHZ DUAL 8SOIC
標(biāo)準(zhǔn)包裝: 1,000
放大器類型: J-FET
電路數(shù): 2
轉(zhuǎn)換速率: 1.8 V/µs
增益帶寬積: 1MHz
電流 - 輸入偏壓: 3pA
電壓 - 輸入偏移: 300µV
電流 - 電源: 340µA
電流 - 輸出 / 通道: 15mA
電壓 - 電源,單路/雙路(±): ±4.5 V ~ 18 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SO
包裝: 帶卷 (TR)
AD648
REV. E
–11–
LOG RATIO AMPLIFIER
Log ratio amplifiers are useful for a variety of signal conditioning
applications, such as linearizing exponential transducer outputs
and compressing analog signals having a wide dynamic range.
The AD648’s picoamp level input current and low input offset
voltage make it a good choice for the front end amplifier of the
log ratio circuit shown in Figure 30. This circuit produces an
output voltage equal to the log base 10 of the ratio of the input
currents I1 and I2. Resistive inputs R1 and R2 are provided
for voltage inputs.
Input currents I1 and I2 set the collector currents of Q1 and Q2,
a matched pair of logging transistors. Voltages at points A and B
are developed according to the following familiar diode equation:
VBE = (kT/q) ln (IC/IES)
In this equation, k is Boltzmann’s constant, T is absolute
temperature, q is an electron charge, and IES is the reverse
saturation current of the logging transistors. The difference of
these two voltages is taken by the subtractor section and scaled
by a factor of approximately 16 by resistors R9, R10, and R8.
Temperature compensation is provided by resistors R8 and
R15,
which have a positive 3500 ppm/
°C temperature coefficient.
The transfer function for the output voltage is:
VOUT = 1 V log10 (I2/I1)
Frequency compensation is provided by R11, R12, C1, and C2.
Small signal bandwidth is approximately 300 kHz at input cur-
rents above 100
A and will proportionally decrease with lower
signal levels. D1, D2, R13, and R14 compensate for the effects
of the two logging transistors’ ohmic emitter resistance.
To trim this circuit, set the two input currents to 10
A and
adjust VOUT to zero by adjusting the potentiometer on A3. Then
set I2 to 1
A and adjust the scale factor such that the output
voltage is 1 V by trimming potentiometer R10. Offset adjust-
ment for A1 and A2 is provided to increase the accuracy of the
voltage inputs.
This circuit ensures a 1% log conformance error over an input
current range of 300 pA to l mA, with low level accuracy limited
by the AD648’s input current. The low level input voltage accu-
racy of this circuit is limited by the input offset voltage and drift
of the AD648.
Figure 30. Precision Log Ratio Amplifier
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