參數(shù)資料
型號: AD662JN
英文描述: 12-Bit Digital-to-Analog Converter
中文描述: 12位數(shù)字到模擬轉換器
文件頁數(shù): 8/40頁
文件大?。?/td> 927K
代理商: AD662JN
REV. A
AD6624
–8–
TIMING DIAGRAMS—INM MICROPORT MODE
TIMING DIAGRAMS—MNM MICROPORT MODE
CLK
RD
(
DS
)
WR
(RW)
CS
A[2:0]
D[7:0]
RDY
(
DTACK
)
t
SC
t
HC
t
HWR
t
SAM
t
SAM
t
HAM
t
DRDY
VALID DATA
VALID ADDRESS
t
HAM
t
ACC
NOTES
1.
t
ACC
ACCESS TIME DEPENDS ON THE ADDRESS ACCESSED. ACCESS TIME IS
MEASURED FROM FE OF
WR
TO THE RE OF RDY.
2.
t
ACC
REQUIRES A MAXIMUM 9 CLK PERIODS.
Figure 14. INM Microport Write Timing Requirements
CLK
RD
(
DS
)
WR
(RW)
A[2:0]
D[7:0]
RDY
(
DTACK
)
t
SC
t
SAM
t
ZD
t
DRDY
VALID DATA
VALID ADDRESS
t
ACC
t
HC
CS
t
ZD
t
HAM
NOTES
1.
t
ACC
ACCESS TIME DEPENDS ON THE ADDRESS ACCESSED. ACCESS
TIME IS MEASURED FROM FE OF
WR
TO THE RE OF RDY.
2.
t
ACC
REQUIRES A MAXIMUM OF 13 CLK PERIODS AND APPLIES TO
A[2:0] = 7, 6, 5, 3, 2, 1
t
DD
Figure 15. INM Microport Read Timing Requirements
CLK
DS
(
RD
)
CS
A[2:0]
D[7:0]
DTACK
(RDY)
t
SC
t
HC
t
HRW
t
SAM
t
SAM
t
HAM
VALID DATA
VALID ADDRESS
t
HAM
t
ACC
NOTES
1.
t
ACC
ACCESS TIME DEPENDS ON THE ADDRESS ACCESSED. ACCESS TIME IS
MEASURED FROM FE OF
DS
TO THE FE OF
DTACK
.
2.
t
ACC
REQUIRES A MAXIMUM 9 CLK PERIODS.
RW (
WR
)
t
DDTACK
t
HDS
Figure 16. MNM Microport Write Timing Requirements
CLK
RD
(
DS
)
WR
(RW)
A[2:0]
D[7:0]
DTACK
(
RDY)
t
SC
t
SAM
t
ZD
VALID DATA
VALID ADDRESS
t
ACC
t
HC
CS
t
ZD
t
HAM
t
DD
t
DDTACK
t
HDS
NOTES
1.
t
ACC
ACCESS TIME DEPENDS ON THE ADDRESS ACCESSED. ACCESS TIME IS
MEASURED FROM FE OF
DS
TO THE FE OF
DTACK
.
2.
t
ACC
REQUIRES A MAXIMUM 13 CLK PERIODS.
Figure 17. MNM Microport Read Timing Requirements
相關PDF資料
PDF描述
AD662KN 12-Bit Digital-to-Analog Converter
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