參數(shù)資料
型號: AD678BD
廠商: Analog Devices Inc
文件頁數(shù): 12/14頁
文件大小: 0K
描述: IC ADC 12BIT SAMPLING 28-CDIP
標準包裝: 1
位數(shù): 12
采樣率(每秒): 200k
數(shù)據(jù)接口: 并聯(lián)
轉換器數(shù)目: 2
功率耗散(最大): 745mW
電壓電源: 模擬和數(shù)字,雙 ±
工作溫度: -40°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 28-CDIP(0.605",15.37mm)
供應商設備封裝: 28-CDIP
包裝: 管件
輸入數(shù)目和類型: 1 個單端,單極;1 個單端,雙極
Definition of Specifications–AD678
NYQUIST FREQUENCY
An implication of the Nyquist sampling theorem, the “Nyquist
Frequency” of a converter is that input frequency which is one-
half the sampling frequency of the converter.
SIGNAL-TO-NOISE AND DISTORTION (S/N+D) RATIO
S/N+D is the ratio of the rms value of the measured input signal
to the rms sum of all other spectral components below the
Nyquist frequency, including harmonics but excluding dc.
TOTAL HARMONIC DISTORTION (THD)
THD is the ratio of the rms sum of the first six harmonic com-
ponents to the rms value of a full-scale input signal and is ex-
pressed as a percentage or in decibels. For input signals or
harmonics that are above the Nyquist frequency, the aliased
component is used.
PEAK SPURIOUS OR PEAK HARMONIC COMPONENT
The peak spurious or peak harmonic component is the largest
spectral component excluding the input signal and dc. This
value is expressed in decibels relative to the rms value of a full-
scale input signal.
INTERMODULATION DISTORTION (IMD)
With inputs consisting of sine waves at two frequencies, fa and
fb, any device with nonlinearities will create distortion products,
of order (m + n), at sum and difference frequencies of mfa
±
nfb, where m, n = 0, 1, 2, 3.... Intermodulation terms are those
for which m or n is not equal to zero. For example, the second
order terms are (fa + fb) and (fa – fb) and the third order terms
are (2 fa + fb), (2 fa – fb), (fa + 2 fb) and (fa – 2 fb). The IMD
products are expressed as the decibel ratio of the rms sum of
the measured input sides to the rms sum of the distortion terms.
The two signals applied to the converter are of equal ampli-
tude and the peak value of their sum is –0.5 dB from full scale
(9.44 V p-p). The IMD products are normalized to a 0 dB
input signal.
BANDWIDTH
The full-power bandwidth is that input frequency at which the
amplitude of the reconstructed fundamental is reduced by 3 dB
for a full-scale input.
The full-linear bandwidth is the input frequency at which the
slew rate limit of the sample-hold-amplifier (SHA) is reached.
At this point, the amplitude of the reconstructed fundamental
has degraded by less than 0.1 dB. Beyond this frequency, distor-
tion of the sampled input signal increases significantly.
The AD678 has been designed to optimize input bandwidth, al-
lowing the AD678 to undersample input signals with frequen-
cies significantly above the converter’s Nyquist frequency.
APERTURE DELAY
Aperture delay is a measure of the SHA’s performance and is
measured from the falling edge of Start Convert (
SC) to when
the input signal is held for conversion. In synchronous mode,
Chip Select (
CS) should be LOW before SC to minimize aper-
ture delay.
APERTURE JITTER
Aperture jitter is the variation in aperture delay for successive
samples and is manifested as noise on the input to the A/D.
INPUT SETTLING TIME
Settling time is a function of the SHA’s ability to track fast slew-
ing signals. This is specified as the maximum time required in
track mode after a full-scale step input to guarantee rated con-
version accuracy.
DIFFERENTIAL NONLINEARITY (DNL)
In an ideal ADC, code transitions are 1 LSB apart. Differential
nonlinearity is the maximum deviation from this ideal value. It
is often specified in terms of resolution for which no missing
codes (NMC) are guaranteed.
UNIPOLAR ZERO ERROR
In unipolar mode, the first transition should occur at a level 1/2
LSB above analog ground. Unipolar zero error is the deviation
of the actual transition from that point. This error can be ad-
justed as discussed in the Input Connections and Calibration
section.
BIPOLAR ZERO ERROR
In the bipolar mode, the major carry transition (1111 1111
1111 to 0000 0000 0000) should occur at an analog value 1/2
LSB below analog ground. Bipolar zero error is the deviation of
the actual transition from that point. This error can be adjusted
as discussed in the Input Connections and Calibration section.
GAIN ERROR
The last transition should occur at an analog value 1 1/2 LSB
below the nominal full scale (9.9963 volts for a 0–10 V range,
4.9963 volts for a
±5 V range). The gain error is the deviation of
the actual difference between the first and last code transition
from the ideal difference between the first and last code transi-
tion. This error can be adjusted as shown in the Input Connec-
tions and Calibration section.
INTEGRAL NONLINEARITY (INL)
The ideal transfer function for a linear ADC is a straight line
drawn between “zero” and “full scale.” The point used as
“zero” occurs 1/2 LSB before the first code transition. “Full
scale” is defined as a level 1 1/2 LSB beyond the last code tran-
sition. Integral nonlinearity is the worst-case deviation of a code
from the straight line. The deviation of each code is measured
from the middle of that code.
POWER SUPPLY REJECTION
Variations in power supply will affect the full-scale transition,
but not the converter’s linearity. Power Supply Rejection is the
maximum change in the full-scale transition point due to a
change in power-supply voltage from the nominal value.
TEMPERATURE DRIFT
This is the maximum change in the parameter from the initial
value (@ +25
°C) to the value at TMIN or TMAX.
REV. C
–7–
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