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| 型號(hào)： | AD679JN |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 14/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 14BIT 128KSPS 28-DIP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 128k |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 745mW |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 28-DIP（0.600"，15.24mm） |
| 供應(yīng)商設(shè)備封裝： | 28-PDIP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 1 個(gè)單端，單極；1 個(gè)單端，雙極 |
AD679
REV. D
–7–
DEFINITIONS OF SPECIFICATIONS
Nyquist Frequency
An implication of the Nyquist sampling theorem, the Nyquist
frequency of a converter is the input frequency that is one-half
the sampling frequency of the converter.
Signal-to-Noise and Distortion (S/N+D) Ratio
S/N+D is the ratio of the rms value of the measured input signal
to the rms sum of all other spectral components below the
Nyquist frequency, including harmonics but excluding dc.
Total Harmonic Distortion (THD)
THD is the ratio of the rms sum of the first six harmonic compo-
nents to the rms value of a full-scale input signal and is expressed
as a percentage or in decibels. For input signals or harmonics
above the Nyquist frequency, the aliased component is used.
Peak Spurious or Peak Harmonic Component
The peak spurious or peak harmonic component is the largest
spectral component excluding the input signal and dc. This
value is expressed in decibels relative to the rms value of a full-
scale input signal.
Intermodulation Distortion (IMD)
With inputs consisting of sine waves at two frequencies, fa and
fb, any device with nonlinearities will create distortion products,
of order (m + n) at sum and difference frequencies of mfa
nfb, where m, n = 0, 1, 2, 3.... Intermodulation terms are those
for which m or n is not equal to zero. For example, the second
order terms are (fa + fb) and (fa – fb) and the third order terms
are (2 fa + fb), (2 fa – fb), (fa + 2 fb) and (fa – 2 fb). The IMD
products are expressed as the decibel ratio of the rms sum of
the measured input signals to the rms sum of the distortion
terms. The two signals applied to the converter are of equal
amplitude, and the peak value of their sum is –0.5 dB from full-
scale (9.44 V p-p). The IMD products are normalized to a 0 dB
input signal.
Bandwidth
The full-power bandwidth is the input frequency at which the
amplitude of the reconstructed fundamental is reduced by 3 dB
for a full-scale input.
The full-linear bandwidth is the input frequency at which the
slew rate limit of the sample-and-hold amplifier (SHA) is
reached. At this point, the amplitude of the reconstructed fun-
damental has degraded by less than –0.1 dB. Beyond this fre-
quency, distortion of the sampled input signal increases
significantly.
The AD679 has been designed to optimize input bandwidth,
allowing it to undersample input signals with frequencies signifi-
cantly above the converter’s Nyquist frequency.
Aperture Delay
Aperture delay is a measure of the SHA’s performance and is
measured from the falling edge of start convert (
SC) to when
the input signal is held for conversion. In synchronous mode,
chip select (
CS) should be LOW before SC to minimize aper-
ture delay.
Aperture Jitter
Aperture jitter is the variation in aperture delay for successive
samples and is manifested as noise on the input to the A/D.
Input Setting Time
Settling time is a function of the SHA’s ability to track fast slew-
ing signals. This is specified as the maximum time required in
track mode after a full-scale step input to guarantee rated con-
version accuracy.
Differential Nonlinearity (DNL)
In an ideal ADC, code transitions are 1 LSB apart. Differential
linearity is the deviation from this ideal value. It is often speci-
fied in terms of resolution for which no missing codes (NMC)
are guaranteed.
Integral Nonlinearity (INL)
The ideal transfer function for a linear ADC is a straight line
drawn between zero and full scale. The point used as zero occcurs
1/2 LSB before the first code transition. Full scale is defined as
a level 1 1/2 LSB beyond the last code transition. Integral linear-
ity error is the worst case deviation of a code from the straight
line. The deviation of each code is measured from the middle of
that code.
Note that the linearity error is not user adjustable.
Power Supply Rejection
Variations in power supply will affect the full-scale transition,
but not the converter’s linearity. Power Supply Rejection is the
maximum change in the full-scale transition point due to a
change in power supply voltage from the nominal value.
Temperature Drift
This is the maximum change in the parameter from the initial
value (@ 25
°C) to the value at T
MIN or TMAX.
Unipolar Zero Error
In unipolar mode, the first transition should occur at a level
1/2 LSB above analog ground. Unipolar zero error is the devia-
tion of the actual transition from that point. This error can be
adjusted as discussed in the Input Connections and Calibration
section.
Bipolar Zero Error
In the bipolar mode, the major carry transition (11 1111 1111
1111 to 00 0000 0000 0000 ) should occur at an analog value
1/2 LSB below analog ground. Bipolar zero error is the devia-
tion of the actual transition from that point. This error can be
adjusted as discussed in the Input Connections and Calibration
section.
Gain Error
The last transition should occur at an analog value 1 1/2 LSB
below the nominal full scale (9.9991 V for a 0 V to 10 V range,
4.9991 V for a
5 V range). The gain error is the deviation of
the actual level at the last transition from the ideal level with the
zero error trimmed out. This error can be adjusted as shown in
the Input Connections and Calibration section.
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