參數(shù)資料
型號: AD7147WPACPZ-500R7
廠商: Analog Devices Inc
文件頁數(shù): 39/73頁
文件大小: 0K
描述: IC CAP-TO-DGTL CONV PROG 24LFCSP
標(biāo)準(zhǔn)包裝: 500
系列: CapTouch™
類型: 電容數(shù)字轉(zhuǎn)換器
分辨率(位): 16 b
采樣率(每秒): 250k
數(shù)據(jù)接口: 串行,SPI?
電壓電源: 單電源
電源電壓: 2.6 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 24-LFCSP-VQ(4x4)
包裝: 帶卷 (TR)
Data Sheet
AD7147
Rev. D | Page 43 of 72
DETAILED REGISTER DESCRIPTIONS
BANK 1 REGISTERS
All addresses and default values are expressed in hexadecimal.
Table 20. PWR_CONTROL Register
Address
Data Bit
Default
Value
Type
Name
Description
0x000
[1:0]
0
R/W
POWER_MODE
Operating modes
00 = full power mode (normal operation, CDC
conversions approximately every 36 ms)
01 = full shutdown mode (no CDC conversions)
10 = low power mode (automatic wake-up operation)
11 = full shutdown mode (no CDC conversions)
[3:2]
0
R/W
LP_CONV_DELAY
Low power mode conversion delay
00 = 200 ms
01 = 400 ms
10 = 600 ms
11 = 800 ms
[7:4]
0
R/W
SEQUENCE_STAGE_NUM
Number of stages in sequence (N + 1)
0000 = 1 conversion stage in sequence
0001 = 2 conversion stages in sequence
Maximum value = 1011 = 12 conversion stages per
sequence
[9:8]
0
R/W
DECIMATION
ADC decimation factor
00 = decimate by 256
01 = decimate by 128
10 = decimate by 64
11 = decimate by 64
[10]
0
R/W
SW_RESET
Software reset control (self-clearing)
1 = resets all registers to default values
[11]
0
R/W
INT_POL
Interrupt polarity control
0 = active low
1 = active high
[12]
0
R/W
EXT_SOURCE
Excitation source control
0 = enable excitation source to CINx pins
1 = disable excitation source to CINx pins
[13]
0
Unused
Set to 0
[15:14]
0
R/W
CDC_BIAS
CDC bias current control
00 = normal operation
01 = normal operation + 20%
10 = normal operation + 35%
11 = normal operation + 50%
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