參數(shù)資料
型號(hào)： AD7147WPACPZ-RL
廠商： Analog Devices Inc
文件頁數(shù)： 24/73頁
文件大?。?/td> 0K
描述： IC CAP-TO-DGTL CONV PROG 24LFCSP
標(biāo)準(zhǔn)包裝： 5,000
系列： CapTouch™
類型： 電容數(shù)字轉(zhuǎn)換器
分辨率（位）： 16 b
采樣率（每秒）： 250k
數(shù)據(jù)接口： 串行，SPI?
電壓電源： 單電源
電源電壓： 2.6 V ~ 3.6 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 24-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 24-LFCSP-VQ（4x4）
包裝： 帶卷 (TR)
Data Sheet
AD7147
Rev. D | Page 29 of 72
INTERRUPT OUTPUT
SENSOR-TOUCH INTERRUPT
The AD7147 has an interrupt output that triggers an interrupt
service routine on the host processor. The INT signal is on
Pin 17 and is an open-drain output. There are three types of
interrupt events on the AD7147: a CDC conversion-complete
interrupt, a sensor touch interrupt, and a GPIO interrupt. Each
interrupt has enable and status registers. The conversion-
complete and sensor-touch (sensor-activation) interrupts can be
enabled on a per-conversion-stage basis. The status registers
indicate what type of interrupt triggered the INT pin. Status
registers are cleared, and the INT signal is reset high during a
read operation. The signal returns high as soon as the read
address has been set up.
The sensor-touch interrupt mode is implemented when the host
processor requires an interrupt only when a sensor is contacted.
Configuring the AD7147 into this mode results in the interrupt
being asserted when the user makes contact with the sensor and
again when the user stops touching the sensor. The second
interrupt is required to alert the host processor that the user is
no longer contacting the sensor.
The registers located at Address 0x005 and Address 0x006 are
used to enable the interrupt output for each stage. The registers
located at Address 0x008 and Address 0x009 are used to read
back the interrupt status for each stage.
CDC CONVERSION-COMPLETE INTERRUPT
Figure 40 shows the interrupt output timing during contact with
one of the sensors connected to STAGE0 while operating in the
sensor-touch interrupt mode. For a low limit configuration, the
interrupt output is asserted as soon as the sensor is contacted and
again after the user has stopped contacting the sensor. (Note that
the interrupt output remains low until the host processor reads
back the interrupt status registers located at Address 0x008 and
Address 0x009.)
The AD7147 interrupt signal asserts low to indicate the completion
of a conversion stage and that new conversion result data is
available in the registers.
The interrupt can be independently enabled for each conversion
stage. Each conversion-stage-complete interrupt can be enabled via
the STAGEx_COMPLETE_INT_ENABLE register (Address 0x007).
This register has a bit that corresponds to each conversion stage.
Setting this bit to 1 enables the interrupt for that stage. Clearing this
bit to 0 disables the conversion-complete interrupt for that stage.
The interrupt output is asserted when there is a change in the
interrupt status bits. This can indicate that a user is touching the
sensor(s) for the first time, the number of sensors being touched
has changed, or the user is no longer touching the sensor(s).
Reading the status bits in the interrupt status register shows the
current sensor activations.
The AD7147 interrupt should be enabled only for the last stage
in a conversion sequence. For example, if there are five conver-
sion stages, only the conversion-complete interrupt for STAGE4
is enabled. Therefore, INT only asserts when all five conversion
stages are complete and the host can read new data from all five
result registers. The interrupt is cleared by reading the STAGEx_
COMPLETE_INT_STATUS register located at Address 0x00A.
4
2
CONVERSION
STAGE
SERIAL
READBACK
INT OUTPUT
3
1
STAGE1
STAGE0
FINGER ON SENSOR
FINGER OFF SENSOR
1USER TOUCHING SENSOR.
2ADDRESS 0x008 IS READ BACK TO CLEAR INTERRUPT.
3USER STOPS TOUCHING SENSOR.
4ADDRESS 0x008 IS READ BACK TO CLEAR INTERRUPT.
06663-
037
Register 0x00A is the conversion-complete interrupt status
register. Each bit in this register corresponds to a conversion
stage. If a bit is set, it means that the conversion-complete
interrupt for the corresponding stage was triggered. This
register is cleared upon a read if the underlying condition
that triggered the interrupt is not present.
Figure 40. Example of Sensor-Touch Interrupt
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