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| 型號(hào)： | AD7147WPACPZ-RL |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 35/73頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC CAP-TO-DGTL CONV PROG 24LFCSP |
| 標(biāo)準(zhǔn)包裝： | 5,000 |
| 系列： | CapTouch™ |
| 類(lèi)型： | 電容數(shù)字轉(zhuǎn)換器 |
| 分辨率（位）： | 16 b |
| 采樣率（每秒）： | 250k |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 電壓電源： | 單電源 |
| 電源電壓： | 2.6 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 24-VFQFN 裸露焊盤(pán)，CSP |
| 供應(yīng)商設(shè)備封裝： | 24-LFCSP-VQ（4x4） |
| 包裝： | 帶卷 (TR) |
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Data Sheet
AD7147
Rev. D | Page 39 of 72
PCB DESIGN GUIDELINES
CAPACITIVE SENSOR BOARD MECHANICAL SPECIFICATIONS
Table 19.
Parameter
Symbol
Min
Typ
Max
Unit
Distance from Edge of Any Sensor to Edge of Grounded Metal Object
D1
0.1
mm
Distance Between Sensor Edges1
0
mm
Distance Between Bottom of Sensor Board and Controller Board or Grounded
Metal Casing2
D5
1.0
mm
1 The distance is dependent on the application and the position of the switches relative to each other and with respect to the user’s finger position and handling.
Adjacent sensors with no space between them are implemented differentially.
2 The 1.0 mm specification is intended to prevent direct sensor board contact with any conductive material. This specification, however, does not guarantee an absence
of EMI coupling from the controller board to the sensors. To avoid potential EMI-coupling issues, place a grounded metal shield between the capacitive sensor board
and the main controller board, as shown in Figure 58.
SLIDER
BUTTONS
CAPACITIVE SENSOR
PRINTED CIRCUIT
D1
D3
D4
8-WAY
SWITCH
METAL OBJECT
D2
06
66
3-
0
53
Figure 56. Capacitive Sensor Board, Top View
D5
CAPACITIVE SENSOR BOARD
CONTROLLER PRINTED CIRCUIT BOARD OR METAL CASING
06
66
3-
05
4
Figure 57. Capacitive Sensor Board, Side View
D5
CAPACITIVE SENSOR BOARD
GROUNDED METAL SHIELD
CONTROLLER PRINTED CIRCUIT BOARD OR METAL CASING
06
663
-05
5
Figure 58. Capacitive Sensor Board with Grounded Shield
CHIP SCALE PACKAGES
The lands on the chip scale package (CP-24-3) are rectangular.
The PCB pad for these should be 0.1 mm longer than the package
land length and 0.05 mm wider than the package land width.
Center the land on the pad to maximize the solder joint size.
The bottom of the chip scale package has a central thermal pad.
The thermal pad on the printed circuit board should be at least
as large as this exposed pad. To avoid shorting, provide a clear-
ance of at least 0.25 mm between the thermal pad and the inner
edges of the land pattern on the PCB.
Thermal vias can be used on the PCB thermal pad to improve
the thermal performance of the package. If vias are used, they
should be incorporated in the thermal pad at a 1.2 mm pitch
grid. The via diameter should be between 0.3 mm and 0.33 mm,
and the via barrel should be plated with 1 oz copper to plug the via.
Connect the PCB thermal pad to GND.
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