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參數(shù)資料
| 型號： | AD7249BNZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 10/14頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT SRL W/REF 16DIP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 25 |
| 系列： | DACPORT® |
| 設(shè)置時(shí)間： | 10µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 雙 ± |
| 功率耗散（最大）： | 300mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 16-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 16-PDIP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 2 電壓，單極；2 電壓，雙極 |
| 采樣率（每秒）： | 125k |
AD7249
–5–
TERMINOLOGY
Bipolar Zero Error
Bipolar Zero Error is the voltage measured at VOUT when the
DAC is configured for bipolar output and loaded with all 0s
(Twos Complement Coding) or with 1000 0000 0000 (Offset
Binary Coding). It is due to a combination of offset errors in the
DAC, amplifier and mismatch between the internal gain resis-
tors around the amplifier.
Full-Scale Error
Full-Scale Error is a measure of the output error when the am-
plifier output is at full scale (for the bipolar output range full
scale is either positive or negative full scale). It is measured with
respect to the reference input voltage and includes the offset
errors.
Digital-to-Analog Glitch Impulse
This is the voltage spike that appears at VOUT when the digital
code in the DAC Latch changes, before the output settles to its
final value. It is normally specified as the area of the glitch in
nV-secs and is measured when the digital code is changed by
1 LSB at the major carry transition (0111 1111 1111 to 1000
0000 0000 or 1000 0000 0000 to 0111 1111 1111).
Digital Feedthrough
This is a measure of the voltage spike that appears on VOUT as a
result of feedthrough from the digital inputs on the AD7249. It
is measured with
LDAC held high.
Relative Accuracy (Linearity)
Relative Accuracy, or endpoint linearity, is a measure of the
maximum deviation of the DAC transfer function from a
straight line passing through the endpoints of the transfer func-
tion. It is measured after allowing for zero and full-scale errors
and is expressed in LSBs or as a percentage of full-scale reading.
Single Supply Linearity and Gain Error
The output amplifier on the AD7249 can have true negative
offsets even when the part is operated from a single +15 V sup-
ply. However, because the negative supply rail (VSS) is 0 V, the
output cannot actually go negative. Instead, when the output
offset voltage is negative, the output voltage sits at 0 V, resulting
in the transfer function shown in Figure 1.
DAC CODE
OUTPUT
VOLTAGE
NEGATIVE
OFFSET
0V
Figure 1. Effect of Negative Offset (Single Supply)
This “knee” is an offset effect, not a linearity error, and the
transfer function would have followed the dotted line if the
output voltage could have gone negative.
Normally, linearity is measured between zero (all 0s input code)
and full scale (all 1s input code) after offset and full scale have
been adjusted out or allowed for, but this is not possible in
single supply operation if the offset is negative, due to the knee
in the transfer function. Instead, linearity of the AD7249 in the
unipolar mode is measured between full scale and the lowest
code which is guaranteed to produce a positive output voltage.
This code is calculated from the maximum specification for
negative offset. For the A and B versions, the linearity is mea-
sured between Codes 3 and 4095. For the S grade, linearity is
measured between Code 5 and Code 4095.
Differential Nonlinearity
Differential Nonlinearity is the difference between the measured
change and the ideal 1 LSB change between any two adjacent
codes. A specified differential nonlinearity of
±1 LSB or less
over the operating temperature range ensures monotonicity.
Unipolar Offset Error
Unipolar Offset Error is the measured output voltage from VOUT
with all zeros loaded into the DAC latch, when the DAC is
configured for unipolar output. It is due to a combination of the
offset errors in the DAC and output amplifier.
CIRCUIT INFORMATION
D/A Section
The AD7249 contains two 12-bit voltage-mode D/A converters
consisting of highly stable thin film resistors and high-speed
NMOS single-pole, double-throw switches. The simplified
circuit diagram for the DAC section is shown in Figure 2. The
output voltage from the converter has the same polarity as the
reference voltage, REFIN, allowing single supply operation.
2R
R
RRRR
REFIN*
AGND
*BUFFERED REFIN VOLTAGE
ROFS
VOUT
SHOWN FOR ALL 1s
ON DAC
Figure 2. D/A Simplified Circuit Diagram
REV. D
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