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參數(shù)資料
| 型號(hào)： | AD7249BRZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 7/14頁 |
| 文件大小： | 0K |
| 描述： | IC DAC 12BIT SRL W/REF 16SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | DACPORT® |
| 設(shè)置時(shí)間： | 10µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 雙 ± |
| 功率耗散（最大）： | 300mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC W |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 2 電壓，單極；2 電壓，雙極 |
| 采樣率（每秒）： | 125k |
–2–
AD7249–SPECIFICATIONS (V
DD = +12 V to +15 V,
1 V
SS = O V or –12 V to –15 V,
1 AGND = DGND = O V, REFIN =
+5 V, RL = 2 k , CL = 100 pF to AGND. All specifications TMIN to TMAX unless otherwise noted.)
Parameter
A Version
2
B Version
2
S Version
2
Unit
Test Conditions/Comments
STATIC PERFORMANCE
Resolution
12
Bits
Relative Accuracy
3
±1
±1/2
±1
LSB max
Differential Nonlinearity
3
±0.9
LSB max
Guaranteed Monotonic
Unipolar Offset Error
3
±5
±6
LSB max
VSS = 0 V or –12 V to –15 V
1; DAC
Latch Contents All 0s
Bipolar Zero Error
3
±6
±5
±7
LSB max
VSS = –12 V to –15 V
1
DAC Latch Contents All 0s
Full-Scale Error
3, 4
±6
±7
LSB max
Full-Scale Temperature Coefficient
±5
ppm of FSR/
°C typ
REFERENCE OUTPUT
REFOUT
4.95/5.05
V min/V max
Reference Temperature Coefficient
±25
±30
ppm/
°C typ
Reference Load Change
(
V
REFOUT vs. IL )
–1
mV max
Reference Load Current (IL)
Change (0
A–100 A)
REFERENCE INPUT
Reference Input Range, REFIN
4.95/5.05
V min/V max
5 V
± 1%
Input Current
5
A max
DIGITAL INPUTS
Input High Voltage, VINH
2.4
V min
Input Low Voltage, VINL
0.8
V max
Input Current
IIN
±1
A max
VIN = 0 V to VDD
Input Capacitance
5
8
pF max
ANALOG OUTPUTS
Output Range Resistor,
ROFSA & ROFSB
15/30
k
min/ max
Output Voltage Ranges
6
+5, +10
V
Single Supply; VSS = 0 V
Output Voltage Ranges
6
+5, +10,
±5
+5, +10,
±5
+5, +10,
±5
V
Dual Supply; VSS = –12 V or –15 V
DC Output Impedance
0.5
typ
AC CHARACTERISTICS
5
Voltage Output Settling-Time
Settling Time to Within
±1/2 LSB of Final Value
Positive Full-Scale Change
10
s max
Typically 3
s
Negative Full-Scale Change
10
s max
Typically 5
s
Digital-to-Analog Glitch Impulse
3
30
nV secs typ
1 LSB Change Around
Major Carry
Digital Feedthrough
3
10
nV secs typ
Digital Crosstalk
3
10
nV secs typ
POWER REQUIREMENTS
VDD Range
+10.8/+16.5
+11.4/+15.75
V min/V max
For Specified Performance Unless
Otherwise Stated
VSS Range (Dual Supplies)
–10.8/–16.5
–11.4/–15.75
V min/V max
For Specified Performance Unless
Otherwise Stated
IDD
15
mA max
Output Unloaded; Typically 11 mA
ISS (Dual Supplies)
5
mA max
Output Unloaded; Typically 3 mA
NOTES
1Power supply tolerance, A Version:
± 10%; B, S Versions: ± 5%.
2Temperature ranges are as follows: A, B Versions: –40
°C to +85°C; S Version: –55°C to +125°C.
3See Terminology.
4Measured with respect to REFIN and includes unipolar/bipolar offset error.
5Guaranteed by design not production tested.
60 V to 10 V output range available only with V
DD
≥ 14.25 V.
Specifications subject to change without notice.
REV. D
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