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參數(shù)資料
| 型號(hào)： | AD7265BCPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 11/29頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT SRL 1MSPS 32LFCSP |
| 設(shè)計(jì)資源： | AD7265 in Differential and Single-Ended Configurations Using AD8022 (CN0048) |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 1M |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 21mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 32-LFCSP-VQ |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 12 個(gè)單端，單極；6 個(gè)差分，單極；6 個(gè)偽差分，單極 |
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AD7265
Rev. A | Page 18 of 28
TRANSFER FUNCTIONS
DIGITAL INPUTS
The designed code transitions occur at successive integer LSB
values (1 LSB, 2 LSB, and so on). In single-ended mode, the LSB
size is V
The digital inputs applied to the AD7265 are not limited by the
maximum ratings that limit the analog inputs. Instead, the
digital inputs can be applied up to 7 V and are not restricted by
the V
/4096 when the 0 V to V
REF
range is used, and the LSB
size is 2 × V
/4096 when the 0 V to 2 × V
REF
range is used. In
differential mode, the LSB size is 2 × V
+ 0.3 V limit, as are the analog inputs. See the
DD
REF
/4096 when the 0 V to
V
section for more information. Another
advantage of the SCLK, RANGE, A0 to A2, and
REF
range is used, and the LSB size is 4 × VREF/4096 when the
0 V to 2 × V
CS pins not
being restricted by the V
REF
range is used. The ideal transfer characteristic
for the AD7265 when straight binary coding is output is shown
in
DD
+ 0.3 V limit is that power supply
sequencing issues are avoided. If one of these digital inputs is
applied before V
Figure 32, and the ideal transfer characteristic for the AD7265
when twos complement coding is output is shown (with the 2 ×
V
DD
, there is no risk of latch-up, as there would
be on the analog inputs if a signal greater than 0.3 V were
applied prior to V
range) in Figure 33.
REF
DD
.
04674-027
000...000
111...111
1LSB = VREF/4096
1LSB
VREF – 1LSB
ANALOG INPUT
ADC
CODE
0V
000...001
000...010
111...110
111...000
011...111
NOTE
1. VREF IS EITHER VREF OR 2 × VREF.
VDRIVE
The AD7265 also has a VDRIVE feature to control the voltage at
which the serial interface operates. VDRIVE allows the ADC to
easily interface to both 3 V and 5 V processors. For example, if
the AD7265 was operated with a V
of 5 V, the V
DD
DRIVE
pin
could be powered from a 3 V supply, allowing a large dynamic
range with low voltage digital processors. Therefore, the
AD7265 could be used with the 2 × V
input range, with a V
REF
DD
of 5 V while still being able to interface to 3 V digital parts.
Figure 32. Straight Binary Transfer Characteristic
04674-028
100...000
011...111
1LSB = 2
× VREF/4096
+VREF – 1 LSB
–VREF + 1LSB VREF – 1LSB
ANALOG INPUT
ADC
CODE
100...001
100...010
011...110
000...001
000...000
111...111
Figure 33. Twos Complement Transfer Characteristic with
V
± V
Input Range
REF
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| AD7265BCPZ-REEL | 功能描述:IC ADC 12BIT 3CHAN 1MSPS 32LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):16 采樣率（每秒）:15 數(shù)據(jù)接口:MICROWIRE?，串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:480µW 電壓電源:單電源 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:38-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:38-QFN（5x7） 包裝:帶卷 (TR) 輸入數(shù)目和類型:16 個(gè)單端，雙極；8 個(gè)差分，雙極 配用:DC1011A-C-ND - BOARD DELTA SIGMA ADC LTC2494 |
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