參數(shù)資料
型號: AD7273
廠商: Analog Devices, Inc.
元件分類: 串行ADC
英文描述: 3MSPS,10-/12-Bit ADCs in 8-Lead TSOT
中文描述: 3MSPS,10-/12-Bit模數(shù)轉(zhuǎn)換器在8引腳TSOT
文件頁數(shù): 9/20頁
文件大?。?/td> 243K
代理商: AD7273
9
REV. PrB
PRELIMINARY TECHNICAL DATA
Preliminary Technical Data
AD7273/AD7274
PIN FUNCTION DESCRIPTION
Pin
Mnemonic
Function
Chip Select. Active low logic input. This input provides the dual function of initiating
conversion on the AD7273/AD7274 and also frames the serial data transfer.
Power Supply Input. The V
DD
range for the AD7273/AD7274 is from +2.35V to +3.6V.
Analog Ground. Ground reference point for all circuitry on the AD7273/AD7274. All
analog input signals should be referred to this GND voltage.
Analog Input. Single-ended analog input channel. The input range is 0 to V
REF
.
Voltage Reference Input. This pin becomes the reference voltage input and an external
reference should be applied at this pin. The external reference input range is 1.2V to V
DD
. A
TBD μF capacitor should be tied between this pin and AGND.
Data Out. Logic output. The conversion result from the AD7273/AD7274 is provided on
this output as a serial data stream. The bits are clocked out on the falling edge of the SCLK
input. The data stream from the AD7274 consists of two leading zeros followed by the 12
bits of conversion data followed by two trailing zeros, which is provided MSB first. The data
stream from the AD7273 consists of two leading zeros followed by the 10 bits of conversion
data followed by four trailing zeros, which is provided MSB first.
Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part.
This clock input is also used as the clock source for the AD7273/AD7274's conversion
process.
V
DD
GND
V
IN
V
REF
SDATA
SCLK
相關(guān)PDF資料
PDF描述
AD7273BRM 3MSPS,10-/12-Bit ADCs in 8-Lead TSOT
AD7273BUJ-REEL 3MSPS,10-/12-Bit ADCs in 8-Lead TSOT
AD7274 3MSPS,10-/12-Bit ADCs in 8-Lead TSOT
AD7274BRM 3MSPS,10-/12-Bit ADCs in 8-Lead TSOT
AD7274BUJ-REEL 3MSPS,10-/12-Bit ADCs in 8-Lead TSOT
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