參數(shù)資料
型號: AD7277
廠商: Analog Devices, Inc.
元件分類: 串行ADC
英文描述: 3MSPS,12-/10-/8-Bit ADCs in 6-Lead TSOT
中文描述: 3MSPS,12/10/8位ADC的6引腳TSOT
文件頁數(shù): 3/20頁
文件大?。?/td> 255K
代理商: AD7277
–3–
REV. PrF
PRELIMINARY TECHNICAL DATA
(
V
DD
=+2.35 V to +3.6 V, f
SCLK
=52 MHz, f
SAMPLE
=3MSPS unless otherwise noted;
T
A
=T
MIN
to T
MAX
, unless otherwise noted.)
Parameter
B Grade
1
Units
Test Conditions/Comments
DYNAMIC PERFORMANCE
Signal-to-Noise + Distortion (SINAD)
2
Total Harmonic Distortion (THD)
2
-73
Peak Harmonic or Spurious Noise (SFDR)
2
-74
Intermodulation Distortion (IMD)
2
Second Order Terms -82
Third Order Terms -82
Aperture Delay
Aperture Jitter
Full Power Bandwidth
Full Power Bandwidth
f
IN
= 1 MHz Sine Wave
61
dB min
dB max
dB max
dB typ
dB typ
ns typ
ps typ
MHz typ
MHz typ
fa= TBD kHz, fb= TBD kHz
fa= TBD kHz, fb= TBD kHz
TBD
TBD
TBD
TBD
@ 3 dB
@ 0.1dB
DC ACCURACY
Resolution
Integral Nonlinearity
2
Differential Nonlinearity
2
Offset Error
2
10
±0.5
±0.5
±1
±TBD
±1
±TBD
±TBD
Bits
LSB max
LSB max
LSB max
LSB typ
LSB max
LSB typ
LSB max
Guaranteed No Missed Codes to 10 Bits
Gain Error
2
Total Unadjusted Error (TUE)
2
ANALOG INPUT
Input Voltage Ranges 0 to V
DD
DC Leakage Current
Input Capacitance
Volts
μA max
pF typ
±0.5
TBD
LOGIC INPUTS
Input High Voltage, V
INH
0.7(V
DD
) V min
2
0.2(V
DD
) V max
0.8
±0.5
±TBD
10
2.35V
2.7V <Vdd 3.6V
2.35V Vdd< 2.7V
2.7V
Vdd 3.6V
Typically TBD nA, V
IN
= 0 V or V
DD
Vdd 2.7V
V min
Input Low Voltage, V
INL
V max
μA max
μA max
pF max
Input Current, I
IN
, SCLK Pin
Input Current, I
IN
,
Input Capacitance, C
IN3
Pin
LOGIC OUTPUTS
Output High Voltage, V
OH
V
DD
- 0.2
Output Low Voltage, V
OL
0.2
Floating-State Leakage Current ±1
Floating-State Output Capacitance
3
10
Output Coding Straight (Natural) Binary
V min
V max
μA max
pF max
I
SOURCE
= 200 μA,V
DD
= 2.35 V to 3.6 V
I
SINK
= 200μA
CONVERSION RATE
Conversion Time
Track/Hold Acquisition Time
2
Throughput Rate
230
50
3
ns max
ns max
MSPS max
12 SCLK cycles with SCLK at 52 MHz
POWER REQUIREMENTS
V
DD
2.35/3.6
I
DD
Normal Mode(Static)
Normal Mode (Operational)
Full Power-Down Mode(Static)
Full Power-Down Mode(Dynamic)
V min/max
Digital I/Ps 0V or V
DD
V
DD
= 2.35V to 3.6V, SCLK On or Off
V
DD
= 2.35V to 3.6V, f
SAMPLE
= 3MSPS
SCLK On or Off, typically TBD nA
V
DD
= 3V, f
SAMPLE
= 1MSPS
2.5
4.5
1
TBD
mA typ
mA max
μA max
mA typ
Power Dissipation
4
Normal Mode (Operational)
Full Power-Down
NOTES
1
Temperature range from –40°C to +85°C.
2
See Terminology.
3
Guaranteed by Characterization.
4
See Power Versus Throughput Rate section.
Specifications subject to change without notice.
13.5
3
mW max
μW max
V
DD
= 3V, f
SAMPLE
= 3MSPS
V
DD
=3V
AD7277-SPECIFICATIONS
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