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參數(shù)資料
| 型號： | AD7304BRZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 14/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 8BIT QUAD R-R 16-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 47 |
| 設(shè)置時間： | 1µs |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 電壓電源： | 雙 ± |
| 功率耗散（最大）： | 60mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC W |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 4 電壓，單極；4 電壓，雙極 |
| 采樣率（每秒）： | 1M |
| 產(chǎn)品目錄頁面： | 784 (CN2011-ZH PDF) |
AD7304/AD7305
Rev. C | Page 3 of 20
SPECIFICATIONS
@ VDD = 3 V or 5 V, VSS = 0 V; or VDD = +5 V and VSS = –5 V, VSS ≤ VREF ≤ VDD, 40°C < TA < +85°C/+125°C, unless otherwise noted.
Table 1.
Parameter
Symbol
Condition
3 V ± 10%
5 V ± 10%
±5 V ± 10%
Unit
STATIC PERFORMANCE
Resolution1
N
8
Bits
Integral Nonlinearity2
INL
±1
LSB max
Differential Nonlinearity
DNL
Monotonic, all codes 0 to 0xFF
±1
LSB max
Zero-Scale Error
VZSE
Data = 0x00
15
±15
mV max
Full-Scale Voltage Error
VFSE
Data = 0xFF
±4
LSB max
Full-Scale Temperature
Coefficient3
TCVFS
5
ppm/°C typ4
REFERENCE INPUT
VREFIN Range
VREFIN
VSS/VDD
V min/max
Input Resistance (AD7304)
RREFIN
Code = 0x55
28
k typ
Input Resistance (AD7305)
RREFIN
All DACs at code = 0x55
7.5
k typ
Input Capacitance3
CREFIN
5
pF typ
ANALOG OUTPUTS
Output Voltage Range
VOUT
VSS/VDD
V min/max
Output Current Drive
IOUT
Code = 0x80, VOUT < 1 LSB
±3
mA typ
Shutdown Resistance
ROUT
DAC outputs placed in shutdown
state
120
k typ
Capacitive Load3
CL
No oscillation
200
pF typ
LOGIC INPUTS
Logic Input Low Voltage
VIL
0.6
0.8
V min
Logic Input High Voltage
VIH
2.1
2.4
V max
Input Leakage Current5
IIL
±10
A max
Input Capacitance3
CIL
8
pF max
AC CHARACTERISTICS3
Output Slew Rate
SR
Code = 0x00 to 0xFF to 0x00
1/2.7
1/3.6
1.0/3.6
V/s min/typ
Reference Multiplying
BW
Small signal, VSS = –5 V
2.6
MHz typ
Total Harmonic Distortion
THD
VREF = 4 V p-p, VSS = –5 V, f = 1 kHz
0.025
%
Settling Time6
tS
To ±0.1% of full scale
1.1/2
1.0/2
s typ/max
Shutdown Recovery Time
tSDR
To ±0.1% of full scale
2
s max
Time to Shutdown
tSDN
15
s typ
DAC Glitch
Q
15
nVs typ
Digital Feedthrough
Q
2
nVs typ
Feedthrough
VOUT/VREF
Code = 0x00, VREF = 1 V p-p, f = 100 kHz
65
dB
SUPPLY CHARACTERISTICS
Positive Supply Current
IDD
VLOGIC = 0 V or VDD, no load
6
mA max
Negative Supply Current
ISS
VSS = –5 V
6
mA max
Power Dissipation
PDISS
VLOGIC = 0 V or VDD, no load
15
30
60
mW max
Power Down
IDD_SD
SDI/SHDN = floating
40
A typ
Power Supply Sensitivity
PSS
VDD = ±10%
0.004
%/%
1 One LSB = VREF/256.
2 The first three codes (0x00, 0x01, 0x10) are excluded from the integral nonlinearity error measurement in single-supply operation 3 V or 5 V.
3 These parameters are guaranteed by design and not subject to production testing.
4 Typical specifications represent average readings measured at 25°C.
5 The SDI/SHDN and A0/SHDN pins have a 30 A maximum IIL input leakage current.
6 The settling time specification does not apply for negative going transitions within the last three LSBs of ground in single-supply operation.
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