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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | AD73311ARZ |
| 寤犲晢锛� | Analog Devices Inc |
| 鏂囦欢闋佹暩(sh霉)锛� | 12/36闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC PROCESSOR FRONT END LP 20SOIC |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 37 |
| 浣嶆暩(sh霉)锛� | 16 |
| 閫氶亾鏁�(sh霉)锛� | 2 |
| 鍔熺巼锛堢摝鐗癸級锛� | 50mW |
| 闆诲 - 闆绘簮锛屾ā鎿細 | 3V |
| 闆诲 - 闆绘簮锛屾暩(sh霉)瀛楋細 | 3V |
| 灏佽/澶栨锛� | 20-SOIC锛�0.295"锛�7.50mm 瀵級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 20-SOIC W |
| 鍖呰锛� | 绠′欢 |
| 鐢�(ch菐n)鍝佺洰閷勯爜闈細 | 799 (CN2011-ZH PDF) |
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鈥�2鈥�
REV. B
AD73311鈥揝PECIFICATIONS1
AD73311A
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
REFERENCE
5VEN = 0
REFCAP
Absolute Voltage, VREFCAP
1.08
1.2
1.32
V
REFCAP TC
50
ppm/
掳C
0.1
F Capacitor Required from
REFOUT
REFCAP to AGND2
Typical Output Impedance
68
Absolute Voltage, VREFOUT
1.08
1.2
1.32
V
Unloaded
Minimum Load Resistance
1
k
Maximum Load Capacitance
100
pF
ADC SPECIFICATIONS
Maximum Input Range at VIN
2, 3
1.578
V p-p
5VEN = 0, Measured Differentially
鈥�2.85
dBm
Nominal Reference Level at VIN
1.0954
V p-p
5VEN = 0, Measured Differentially
(0 dBm0)
鈥�6.02
dBm
Absolute Gain
PGA = 0 dB
鈥�0.75
0.1
+1.0
dB
1.0 kHz, 0 dBm0
PGA = 38 dB
鈥�1.5
鈥�0.5
+0.5
dB
1.0 kHz, 0 dBm0
Gain Tracking Error
卤0.1
dB
1.0 kHz, +3 dBm0 to 鈥�50 dBm0
Signal to (Noise + Distortion)
Refer to Figure 5
PGA = 0 dB
70
76
dB
300 Hz to 3.4 kHz Frequency Range
55
56
dB
0 Hz to 32 kHz Frequency Range
PGA = 38 dB
61
65
dB
300 Hz to 3.4 kHz Frequency Range
53
54
dB
0 Hz to 32 kHz Frequency Range
Total Harmonic Distortion
PGA = 0 dB
鈥�83
鈥�70
dB
PGA = 38 dB
鈥�83
鈥�70
dB
Intermodulation Distortion
鈥�78
dB
PGA = 0 dB
Idle Channel Noise
鈥�76
dBm0
PGA = 0 dB
Crosstalk
鈥�100
dB
ADC Input Signal Level: 1.0 kHz, 0 dBm0
DAC Input at Idle
DC Offset
鈥�20
+15
+50
mV
PGA = 0 dB
Power Supply Rejection
鈥�55
dB
Input Signal Level at AVDD and DVDD
Pins 1.0 kHz, 100 mV p-p Sine Wave
Group Delay
4, 5
25
s
64 kHz Output Sample Rate
Input Resistance at VIN
2, 4
25
k
6
DMCLK = 16.384 MHz
DAC SPECIFICATIONS
Maximum Voltage Output Swing
2
Single Ended
1.578
V p-p
5VEN = 0, PGA = 6 dB
鈥�2.85
dBm
Differential
3.156
V p-p
5VEN = 0, PGA = 6 dB
3.17
dBm
Nominal Voltage Output Swing (0 dBm0)
Single-Ended
1.0954
V p-p
5VEN = 0, PGA = 6 dB
鈥�6.02
dBm
Differential
2.1909
V p-p
5VEN = 0, PGA = 6 dB
0
dBm
Output Bias Voltage
1.08
1.2
1.32
V
5VEN = 0, REFOUT Unloaded
Absolute Gain
鈥�0.75
+0.2
+1.0
dB
1.0 kHz, 0 dBm0
Gain Tracking Error
卤0.1
dB
1.0 kHz, +3 dBm0 to 鈥�50 dBm0
Signal to (Noise + Distortion)
AVDD = +3 V
卤 5%; Refer to Figure 5
PGA = 0 dB
62.5
70
dB
300 Hz to 3.4 kHz Frequency Range
62.5
dB
0 Hz to 32 kHz Frequency Range
PGA = 6 dB
62.5
71
dB
300 Hz to 3.4 kHz Frequency Range
62.5
dB
0 Hz to 32 kHz Frequency Range
Total Harmonic Distortion
AVDD = +3 V
卤 5%
PGA = 0 dB
鈥�70
鈥�62.5
dB
PGA = 6 dB
鈥�70
鈥�62.5
dB
Intermodulation Distortion
鈥�68
dB
PGA = 0 dB
Idle Channel Noise
鈥�82
dBm0
PGA = 0 dB
Crosstalk
鈥�100
dB
ADC Input Signal Level: AGND; DAC
Output Signal Level: 1.0 kHz, 0 dBm0
(AVDD = +3 V
10%; DVDD = +3 V
10%; DGND = AGND = 0 V, fMCLK = 16.384 MHz,
FS = 64 kHz; TA = TMIN to TMAX, unless otherwise noted)
鐩搁棞(gu膩n)PDF璩囨枡 |
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|---|---|
| VE-J5F-MW-F1 | CONVERTER MOD DC/DC 72V 100W |
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| AD73311LARSZ-REEL7 | IC PROCESSOR FRONT END LP 20SSOP |
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鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| AD73311ARZ-REEL | 鍔熻兘鎻忚堪:IC PROCESSOR FRONT END LP 20SOIC RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 妯℃摤鍓嶇 (AFE) 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:2,500 绯诲垪:- 浣嶆暩(sh霉):- 閫氶亾鏁�(sh霉):2 鍔熺巼锛堢摝鐗癸級:- 闆诲 - 闆绘簮锛屾ā鎿�:3 V ~ 3.6 V 闆诲 - 闆绘簮锛屾暩(sh霉)瀛�:3 V ~ 3.6 V 灏佽/澶栨:32-VFQFN 瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:32-QFN锛�5x5锛� 鍖呰:甯跺嵎 (TR) |
| AD73311L | 鍒堕€犲晢:AD 鍒堕€犲晢鍏ㄧū:Analog Devices 鍔熻兘鎻忚堪:Low Cost, Low Power CMOS General Purpose Analog Front End |
| AD73311LAR | 鍒堕€犲晢:Analog Devices 鍔熻兘鎻忚堪:Audio Codec 1ADC / 1DAC 16-Bit 20-Pin SOIC W 鍒堕€犲晢:Rochester Electronics LLC 鍔熻兘鎻忚堪:SINGLE-CHANNEL AFE I.C. - Bulk |
| AD73311LAR-REEL | 鍒堕€犲晢:Analog Devices 鍔熻兘鎻忚堪:Audio Codec 1ADC / 1DAC 16-Bit 20-Pin SOIC W T/R 鍒堕€犲晢:Rochester Electronics LLC 鍔熻兘鎻忚堪:SINGLE-CHANNEL AFE I.C. - Tape and Reel |
| AD73311LAR-REEL7 | 鍒堕€犲晢:Analog Devices 鍔熻兘鎻忚堪:Audio Codec 1ADC / 1DAC 16-Bit 20-Pin SOIC W T/R 鍒堕€犲晢:Rochester Electronics LLC 鍔熻兘鎻忚堪:SINGLE-CHANNEL AFE I.C. - Tape and Reel |
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