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參數(shù)資料
| 型號： | AD7393AR |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | +3 V, Parallel Input Micropower 10- and 12-Bit DACs |
| 中文描述： | PARALLEL, WORD INPUT LOADING, 70 us SETTLING TIME, 10-BIT DAC, PDSO20 |
| 封裝： | MS-013AC, SOIC-20 |
| 文件頁數(shù)： | 8/11頁 |
| 文件大?。?/td> | 199K |
| 代理商： | AD7393AR |
AD7392/AD7393
–8–
REV. A
POWER SUPPLY BYPASSING AND GROUNDING
Precision analog products, such as the AD7392/AD7393, require a
well filtered power source. Since the AD7392/AD7393 oper-
ate from a single +3 V to +5 V supply, it seems convenient to
simply tap into the digital logic power supply. Unfortunately,
the logic supply is often a switch-mode design, which generates
noise in the 20 kHz to 1 MHz range. In addition, fast logic gates
can generate glitches of hundreds of millivolts in amplitude due
to wiring resistance and inductance. The power supply noise
generated as a result means that special care must be taken to
assure that the inherent precision of the DAC is maintained.
Good engineering judgment should be exercised when address-
ing the power supply grounding and bypassing of the AD7392.
The AD7392 should be powered directly from the system power
supply. This arrangement, shown in Figure 26, employs an LC
filter and separate power and ground connections to isolate the
analog section from the logic switching transients.
100
F
ELECT.
10-22
m
F
TANT.
0.1
m
F
CER.
TTL/CMOS
LOGIC
CIRCUITS
+5V
POWER SUPPLY
+5V
+5V
RETURN
FERRITE BEAD:
2 TURNS, FAIR-RITE
#2677006301
Figure 26. Use Separate Traces to Reduce Power Supply
Noise
Whether or not a separate power supply trace is available, gener-
ous supply bypassing will reduce supply line induced errors.
Local supply bypassing, consisting of a 10
μ
F tantalum electro-
lytic in parallel with a 0.1
μ
F ceramic capacitor, is recom-
mended in all applications (Figure 27).
V
OUT
CS
1
20
19
17, 18
4
3
2
C
*
RS
DB0–DB11
+2.7V TO +5.5V
V
DD
REF
GND
SHDN
AD7392
OR
AD7393
0.1
m
F
10
m
F
* OPTIONAL EXTERNAL
REFERENCE BYPASS
Figure 27. Recommended Supply Bypassing for the
AD7392/AD7393
AMPLIFIER SECTION
The internal DAC’s output is buffered by a low power con-
sumption precision amplifier. The op amp has a 60
μ
s typical
settling time to 0.1% of full scale. There are slight differences in
settling time for negative slewing signals versus positive. Also,
negative transition settling-time to within the last 6 LSBs of
zero volts has an extended settling time. The rail-to-rail output
stage of this amplifier has been designed to provide precision
performance while operating near either power supply. Figure
25 shows an equivalent output schematic of the rail-to-rail-
amplifier with its N-channel pull-down FETs that will pull an
output load directly to GND. The output sourcing current is
provided by a P-channel pull-up device that can source current
to GND terminated loads.
P-CH
N-CH
V
DD
V
OUT
AGND
Figure 25. Equivalent Analog Output Circuit
The rail-to-rail output stage provides
±
1 mA of output current.
The N-channel output pull-down MOSFET, shown in Figure
25, has a 35
ON resistance that sets the sink current capability
near ground. In addition to resistive load driving capability, the
amplifier also has been carefully designed and characterized for
up to 100 pF capacitive load driving capability.
REFERENCE INPUT
The reference input terminal has a constant input resistance
independent of digital code, which results in reduced glitches
on the external reference voltage source. The high 2.5 M
input-resistance minimizes power dissipation within the
AD7392/AD7393 D/A converters. The V
REF
input accepts
input voltages ranging from ground to the positive-supply volt-
age V
DD
. One of the simplest applications that saves an external
reference voltage source is connection of the REF terminal to
the positive V
DD
supply. This connection results in a rail-to-rail
voltage output span maximizing the programmed range. The
reference input will accept ac signals as long as they are kept
within the supply voltage range, 0 < V
REF IN
< V
DD
. The refer-
ence bandwidth and integral nonlinearity error performance are
plotted in the typical performance section (see Figures 20 and
21). The ratiometric reference feature makes the AD7392/
AD7393 an ideal companion to ratiometric analog-to-digital
converters such as the AD7896.
POWER SUPPLY
The very low power consumption of the AD7392/AD7393 is a
direct result of a circuit design optimizing the use of a CBCMOS
process. By using the low power characteristics of CMOS for
the logic and the low noise, tight-matching of the complemen-
tary bipolar transistors, excellent analog accuracy is achieved.
One advantage of the rail-to-rail output amplifiers used in the
AD7392/AD7393 is the wide range of usable supply voltage.
The part is fully specified and tested for operation from +2.7 V
to +5.5 V.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7393ARU | 制造商:AD 制造商全稱:Analog Devices 功能描述:+3 V, Parallel Input Micropower 10- and 12-Bit DACs |
| ad7393aru-reel | 制造商:Rochester Electronics LLC 功能描述:10-BIT +3V TO +5V UPOWER DAC, PARALLEL - Tape and Reel 制造商:Analog Devices 功能描述: |
| AD7393ARZ | 制造商:Analog Devices 功能描述:DAC 1-CH R-2R 10-bit 20-Pin SOIC W |
| AD7394 | 制造商:AD 制造商全稱:Analog Devices 功能描述:3 V, Dual, Serial Input 12-/10-Bit DACs |
| AD7394AN | 制造商:Rochester Electronics LLC 功能描述:X2, 12-BIT, +3V UPWR DAC - Bulk 制造商:Analog Devices 功能描述:IC 12BIT DAC 7394 DIP14 |
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