AD7476/AD7477/AD7478
Rev. F | Page 5 of 24
AD7477 SPECIFICATIONS
VDD = 2.7 V to 5.25 V, fSCLK = 20 MHz, TA = TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
Unit
Test Conditions/Comments
DYNAMIC PERFORMANCE
fIN = 100 kHz sine wave, fSAMPLE = 1 MSPS
Signal-to-(Noise + Distortion) (SINAD)
61
dB min
Total Harmonic Distortion (THD)
373
dB max
Peak Harmonic or Spurious Noise
(SFDR)374
dB max
Intermodulation Distortion
(IMD)3Second-Order Terms
78
dB typ
fa = 103.5 kHz, fb = 113.5 kHz
Third-Order Terms
78
dB typ
fa = 103.5 kHz, fb = 113.5 kHz
Aperture Delay
10
ns typ
Aperture Jitter
30
ps typ
Full Power Bandwidth
6.5
MHz typ
@ 3 dB
DC ACCURACY
Resolution
10
Bits
±1
LSB max
Differential Nonlinearity
3±0.9
LSB max
Guaranteed no missed codes to 10 bits
±1
LSB max
±1
LSB max
ANALOG INPUT
Input Voltage Ranges
0 to VDD
V
DC Leakage Current
±1
μA max
Input Capacitance
30
pF typ
LOGIC INPUTS
Input High Voltage, VINH
2.4
V min
Input Low Voltage, VINL
0.8
V max
VDD = 5 V
0.4
V max
VDD = 3 V
Input Current, IIN, SCLK Pin
±1
μA max
Typically 10 nA, VIN = 0 V or VDD
Input Current, IIN, CS Pin
±1
μA typ
10
pF max
LOGIC OUTPUTS
Output High Voltage, VOH
VDD – 0.2
V min
ISOURCE = 200 μA, VDD = 2.7 V to 5.25 V
Output Low Voltage, VOL
0.4
V max
ISINK = 200 μA
Floating-State Leakage Current
±10
μA max
Floating-State Output Capacitance
410
pF max
Output Coding
Straight (Natural) Binary
CONVERSION RATE
Conversion Time
800
ns max
16 SCLK cycles with SCLK at 20 MHz
Track-and-Hold Acquisition Time
400
ns max
Throughput Rate
1
MSPS max