參數(shù)資料
型號: AD7476AYKSZ-REEL7
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: 2.35 V to 5.25 V, 1 MSPS, 12-/10-/8-Bit ADCs in 6-Lead SC70
中文描述: 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO6
封裝: ROHS COMPLIANT, MO-203AB, SC-70, 6 PIN
文件頁數(shù): 10/24頁
文件大?。?/td> 580K
代理商: AD7476AYKSZ-REEL7
REV. C
–10–
AD7476A/AD7477A/AD7478A
PIN CONFIGURATIONS
PIN FUNCTION DESCRIPTIONS
Mnemonic
Function
CS
Chip Select. Active low logic input. This input provides the dual function of initiating conversions on the
AD7476A/AD7477A/AD7478A and also frames the serial data transfer.
Power Supply Input. The V
DD
range for the AD7476A/AD7477A/AD7478A is from 2.35 V to 5.25 V.
Analog Ground. Ground reference point for all circuitry on the AD7476A/AD7477A/AD7478A. All analog input
signals should be referred to this GND voltage.
Analog Input. Single-ended analog input channel. The input range is 0 V to V
DD
.
Data Out. Logic output. The conversion result from the AD7476A/AD7477A/AD7478A is provided on this output as a
serial data stream. The bits are clocked out on the falling edge of the SCLK input. The data stream from the AD7476A
consists of four leading zeros followed by the 12 bits of conversion data, which are provided MSB first. The data stream
from the AD7477A consists of four leading zeros followed by the 10 bits of conversion data followed by two trailing
zeros, provided MSB first. The data stream from the AD7478A consists of four leading zeros followed by the 8 bits
of conversion data followed by four trailing zeros, which are provided MSB first.
Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock input is also
used as the clock source for the AD7476A/AD7477A/AD7478A
s conversion process.
No Connect.
V
DD
GND
V
IN
SDATA
SCLK
NC
8-Lead MSOP
8
7
6
5
1
2
3
4
NC = NO CONNECT
V
DD
SDATA
CS
V
IN
GND
SCLK
NC
NC
TOP VIEW
(Not to Scale)
AD7476A/
AD7477A/
AD7478A
6-Lead SC70
TOP VIEW
(Not to Scale)
6
5
4
1
2
3
V
DD
GND
V
IN
CS
SDATA
SCLK
AD7476A/
AD7477A/
AD7478A
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