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參數(shù)資料
| 型號(hào)： | AD7490 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 串行ADC |
| 英文描述： | 16-Channel, 1 MSPS, 12-Bit ADC with Sequencer in 28-Lead TSSOP |
| 中文描述： | 16路，1 MSPS的12位序列ADC的28引腳TSSOP |
| 文件頁(yè)數(shù)： | 7/24頁(yè) |
| 文件大?。?/td> | 2255K |
| 代理商： | AD7490 |
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AD7490
–7–
REV. A
TERMINOLOGY
Integral Nonlinearity
This is the maximum deviation from a straight line passing through
the endpoints of the ADC transfer function. The endpoints of
the transfer function are zero scale, a point 1 LSB below the first
code transition, and full scale, a point 1 LSB above the last code
transition.
Differential Nonlinearity
This is the difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
Offset Error
This is the deviation of the first code transition (00
…
000) to
(00
…
001) from the ideal, i.e., AGND 1 LSB.
Offset Error Match
This is the difference in offset error between any two channels.
Gain Error
This is the deviation of the last code transition (111
…
110) to
(111
…
111) from the ideal (i.e., REF
IN
1 LSB) after the offset
error has been adjusted out.
Gain Error Match
This is the difference in gain error between any two channels.
Zero Code Error
This applies when using the twos complement output coding
option, in particular to the 2
REF
IN
input range with
–
REF
IN
to +REF
IN
biased about the REF
IN
point. It is the deviation of the
midscale transition (all 0s to all 1s) from the ideal V
IN
voltage,
i.e., REF
IN
–
1 LSB.
Zero Code Error Match
This is the difference in zero code error between any two channels.
Positive Gain Error
This applies when using the twos complement output coding
option, in particular to the 2
REF
IN
input range with
–
REF
IN
to +REF
IN
biased about the REF
IN
point. It is the deviation of
the last code transition (011
…
110) to (011
…
111) from the ideal
(i.e., +REF
IN
1 LSB) after the Zero Code Error has been
adjusted out.
Positive Gain Error Match
This is the difference in Positive Gain Error between any two
channels.
Negative Gain Error
This applies when using the twos complement output coding
option, in particular to the 2
REF
IN
input range with
–
REF
IN
to +REF
IN
biased about the REF
IN
point. It is the deviation of
the first code transition (100
…
000) to (100
…
001) from the
ideal (i.e.,
–
REF
IN
+ 1 LSB) after the Zero Code Error has been
adjusted out.
Negative Gain Error Match
This is the difference in negative gain error between any two
channels.
Channel-to-Channel Isolation
Channel-to-channel isolation is a measure of the level of cross-
talk between channels. It is measured by applying a full-scale
400 kHz sine wave signal to all 15 nonselected input channels and
determining how much that signal is attenuated in the selected
channel with a 50 kHz signal. The figure is given worst case
across all 16 channels for the AD7490.
PSR (Power Supply Rejection)
Variations in power supply will affect the full scale transition, but not
the converter
’
s linearity. Power supply rejection is the maximum
change in full-scale transition point due to a change in power-
supply voltage from the nominal value. (See Typical Performance
Characteristics.)
Track/Hold Acquisition Time
The track/hold amplifier returns into track on the 14th SCLK
falling edge. Track/hold acquisition time is the minimum time
required for the track and hold amplifier to remain in track
mode for its output to reach and settle to within
±
1 LSB of the
applied input signal, given a step change to the input signal.
Signal to (Noise + Distortion) Ratio
This is the measured ratio of signal to (noise + distortion) at the
output of the A/D converter. The signal is the rms amplitude of
the fundamental. Noise is the sum of all nonfundamental signals
up to half the sampling frequency (f
S
/2), excluding dc. The ratio
is dependent on the number of quantization levels in the digitiza-
tion process; the more levels, the smaller the quantization noise.
The theoretical signal to (noise + distortion) ratio for an ideal
N-bit converter with a sine wave input is given by:
Distortion
(
+
Thus for a 12-bit converter, this is 74 dB.
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the rms sum of
harmonics to the fundamental. For the AD7490, it is defined as:
Signal to Noise
N
dB
)
) (6 02
=
.
+
1 76
THD dB
V
V
V
V
V
V
(
)
log
=
×
+
+
+
+
20
2
2
3
2
4
2
5
2
6
2
1
where
V
1
is the rms amplitude of the fundamental and
V
2
,
V
3
,
V
4
,
V
5
, and
V
6
are the rms amplitudes of the second through the
sixth harmonics.
Peak Harmonic or Spurious Noise
Peak harmonic or spurious noise is defined as the ratio of the rms
value of the next largest component in the ADC output spectrum
(up to f
S
/2 and excluding dc) to the rms value of the fundamental.
Normally, the value of this specification is determined by the
largest harmonic in the spectrum, but for ADCs where the har-
monics are buried in the noise floor, it will be a noise peak.
Intermodulation Distortion
With inputs consisting of sine waves at two frequencies, fa and fb,
any active device with nonlinearities will create distortion products
at sum and difference frequencies of mfa
±
nfb, where m, n = 0,
1, 2, 3, and so on. Intermodulation distortion terms are those for
which neither m nor n are equal to zero. For example, the second
order terms include (fa + fb) and (fa
–
fb), while the third order
terms include (2fa + fb), (2fa
–
fb), (fa + 2fb) and (fa
–
2fb).
The AD7490 is tested using the CCIF standard where two input
frequencies near the top end of the input bandwidth are used.
In this case, the second order terms are usually distanced in
frequency from the original sine waves while the third order terms
are usually at a frequency close to the input frequencies. As a
result, the second and third order terms are specified separately.
The calculation of the intermodulation distortion is as per the
THD specification, where it is the ratio of the rms sum of the
individual distortion products to the rms amplitude of the sum
of the fundamentals expressed in dBs.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7490_12 | 制造商:AD 制造商全稱:Analog Devices 功能描述:16-Channel, 1 MSPS, 12-Bit ADC with Sequencer in 28-Lead TSSOP |
| AD7490BCP | 制造商:Analog Devices 功能描述:ADC Single SAR 1Msps 12-bit Serial 32-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:12 BIT 16 CHANNEL ADC IC - Bulk 制造商:Analog Devices 功能描述:IC 12-BIT ADC |
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