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參數(shù)資料
| 型號(hào)： | AD7524JP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | CMOS 8-Bit Buffered Multiplying DAC |
| 中文描述： | PARALLEL, 8 BITS INPUT LOADING, 0.5 us SETTLING TIME, 8-BIT DAC, PQCC20 |
| 封裝： | PLASTIC, LCC-20 |
| 文件頁(yè)數(shù)： | 3/8頁(yè) |
| 文件大小： | 162K |
| 代理商： | AD7524JP |
AD7524
REV. B
–3–
ABSOLUT E MAX IMUM RAT INGS*
(T
A
= +25
°
C, unless otherwise noted)
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V, +17 V
V
RFB
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
25 V
V
REF
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
25 V
Digital Input Voltage to GND . . . . . . . . –0.3 V to V
DD
+0.3 V
OUT 1, OUT 2 to GND . . . . . . . . . . . . . –0.3 V to V
DD
+0.3 V
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. T his is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Power Dissipation (Any Package)
T o +75
°
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450 mW
Derates above 75
°
C by . . . . . . . . . . . . . . . . . . . . 6 mW/
°
C
Operating T emperature
Commercial (J, K , L) . . . . . . . . . . . . . . . . . –40
°
C to +85
°
C
Industrial (A, B, C) . . . . . . . . . . . . . . . . . . –40
°
C to +85
°
C
Extended (S, T , U) . . . . . . . . . . . . . . . . . –55
°
C to +125
°
C
Storage T emperature . . . . . . . . . . . . . . . . . . –65
°
C to +150
°
C
Lead T emperature (Soldering, 10 secs) . . . . . . . . . . . +300
°
C
WARNING!
ESD SENSITIVE DEVICE
C AUT ION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7524 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. T herefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
T E RMINOLOGY
RE LAT IVE ACCURACY :
A measure of the deviation from a
straight line through the end points of the DAC transfer function.
Normally expressed as a percentage of full scale range. For the
AD7524 DAC, this holds true over the entire V
REF
range.
RE SOLUT ION:
Value of the LSB. For example, a unipolar con-
verter with n bits has a resolution of (2
–n
) (V
REF
). A bipolar con-
verter of n bits has a resolution of [2
–(n–1)
] [V
REF
]. Resolution in no
way implies linearity.
GAIN E RROR:
Gain Error is a measure of the output error be-
tween an ideal DAC and the actual device output. It is measured
with all 1s in the DAC after offset error has been adjusted out
and is expressed in LSBs. Gain Error is adjustable to zero with
an external potentiometer.
FE E DT HROUGH E RROR:
Error caused by capacitive cou-
pling from V
REF
to output with all switches OFF.
OUT PUT CAPACIT ANCE :
Capacity from OUT 1 and
OUT 2 terminals to ground.
OUT PUT LE AK AGE CURRE NT :
Current which appears
on OUT 1 terminal with all digital inputs LOW or on OUT 2
terminal when all inputs are HIGH. T his is an error current
which contributes an offset voltage at the amplifier output.
PIN CONFIGURAT IONS
DIP, SOIC
PLCC
LCCC
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| AD7524JR | 功能描述:IC DAC 8BIT MULTIPLYING 16-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:47 系列:- 設(shè)置時(shí)間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:55µW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類型:1 電流，單極；1 電流，雙極 采樣率（每秒）:* |
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