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參數(shù)資料
| 型號(hào)： | AD7568BP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | EB Melody & Chime Series; Mounting Style: Panel mount; Functions: Melody & Chime; Rated Voltage: 120V AC; Style: Box style; Color: Beige Enclosure; Diameter: 133mm square; Applicable Model: EB |
| 中文描述： | OCTAL, SERIAL INPUT LOADING, 0.5 us SETTLING TIME, 12-BIT DAC, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 12/12頁 |
| 文件大?。?/td> | 241K |
| 代理商： | AD7568BP |
AD7568
REV. B
–12–
For systems which contain larger numbers of AD7568s and
where the user also wishes to read back the DAC contents for
diagnostic purposes, the SDOUT pin may be used to daisy
chain several devices together and provide the necessary serial
readback. An example with the 68HC11 is shown in Figure 25.
T he routine below shows how four AD7568s would be pro-
grammed in such a system. Data is transmitted at the MOSI pin
of the 68HC11. It flows through the input shift registers of the
AD7568s and finally appears at the SDOUT pin of DAC N. So,
the readback routine can be invoked any time after the first four
words have been transmitted (the four input shift registers in the
chain will now be filled up and further activity on the CLK IN
pin will result in data being read back to the microcomputer
through the MISO pin). System connectivity can be verified in
this manner. For a four-device system (32 DACs) a two-line to
four-line decoder is necessary.
Note that to program the 32 DACs, 35 transmit operations are
needed. In the routine, three words must be retransmitted. T he
first word for DACs #3, #2 and #1 must be transmitted twice in
order to synchronize their arrival at the SDIN pin with A0 going
low.
T able V. Routine for Loading 4 AD7568s Connected As in
Figure 25
Bring PC7 (
FSIN
) low to allow writing to the AD7568s.
Enable AD7568 #4 (Bring A0 low). Disable the others.
T ransmit 1st 16-bit word: Data for DAC H, #4
. . . .
. . . .
T ransmit 9th 16-bit word: Data for DAC H, #3
T ransmit 9th 16-bit word again: Data for DAC H, #3
T ransmit 10th 16-bit word: Data for DAC G, #3
T ransmit 11th 16-bit word: Data for DAC F, #3
Enable AD7568 #3, Disable the others.
T ransmit 12th 16-bit word: Data for DAC E, #3
. . . .
. . . .
T ransmit 17th 16-bit word: Data for DAC H, #2
T ransmit 17th 16-bit word again: Data for DAC H, #2
T ransmit 18th 16-bit word: Data for DAC G, #2
Enable AD7568 #2, Disable the others.
T ransmit 19th 16-bit word: Data for DAC F, #2
. . . .
. . . .
T ransmit 25th word: Data for DAC H, #1
Enable AD7568 #1, Disable the others.
T ransmit 25th word again: Data for DAC H, #1
T ransmit 26th word: Data for DAC G, #1
. . . .
. . . .
T ransmit 32nd word: Data for DAC A, #1
Bring PC7 (
FSIN
) high to disable writing to the AD7568s.
PC7
SCK
PC6
MISO
SCLK
SDIN
LDAC
A0
FSIN
68HC11*
AD7568*
(DAC 1)
*ADDITIONAL PINS OMITTED FOR CLARITY
SCLK
LDAC
FSIN
AD7568*
(DAC 2)
A0
DECODE LOGIC
SDIN
MOSI
SDOUT
SDOUT
SCLK
LDAC
FSIN
AD7568*
(DAC N)
A0
SDIN
SDOUT
Figure 25. Multi-DAC System
OUT LINE DIME NSIONS
Dimensions shown in inches and (mm).
44-Pin PQFP
(Suffix S)
1
44
34
33
23
22
12
11
TOP VIEW
PIN 1
0.014
±
0.002
(0.35
±
0.05)
0.031
±
0.002
(0.8
±
0.05)
4
°±
4
°
0.096 (2.45) MAX
0.031
±
0.006
(0.8
±
0.15)
0.394
±
0.004
(10
±
0.1)
0.079 + 0.004/–0.002
(2 + 0.1/–0.05)
0.036
±
0.004
(0.92
±
0.1)
0.036
±
0.004
(0.92
±
0.1)
0.394
±
0.004 SQ
(10
±
0.1)
0.547
±
0.01 SQ
(13.9
±
0.25)
C
P
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