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參數(shù)資料
型號(hào)： AD7568BSZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 13/14頁(yè)
文件大小： 0K
描述： IC DAC 12BIT OCTAL LC2MOS 44MQFP
產(chǎn)品培訓(xùn)模塊： Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝： 1
設(shè)置時(shí)間： 500ns
位數(shù)： 12
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 8
電壓電源： 單電源
功率耗散（最大）： 17.5mW
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 44-QFP
供應(yīng)商設(shè)備封裝： 44-MQFP（10x10）
包裝： 托盤
輸出數(shù)目和類型： 16 電流，單極；16 電流，雙極
采樣率（每秒）： 2M
產(chǎn)品目錄頁(yè)面： 785 (CN2011-ZH PDF)
AD7568
–8–
UNIPOLAR BINARY OPERATION
(2-Quadrant Multiplication)
Figure 15 shows the standard unipolar binary connection dia-
gram for one of the DACs in the AD7568. When VIN is an ac
signal, the circuit performs 2-quadrant multiplication. Resistors
R1 and R2 allow the user to adjust the DAC gain error. Offset
can be removed by adjusting the output amplifier offset voltage.
A1 should be chosen to suit the application. For example, the
AD OP07 or OP177 are ideal for very low bandwidth applica-
tions while the AD843 and AD845 offer very fast settling time
in wide bandwidth applications. Appropriate multiple versions
of these amplifiers can be used with the AD7568 to reduce
board space requirements.
The code table for Figure 15 is shown in Table III.
DAC A
A1
I
A
OUT1
I
A
OUT2
AD7568
V
OUT
R
A
FB
V
A
REF
V
IN
NOTES
1. ONLY ONE DAC IS SHOWN FOR CLARITY.
2. DIGITAL INPUT CONNECTIONS ARE OMITTED.
3. C1 PHASE COMPENSATION (5–15pF) MAY BE
REQUIRED WHEN USING HIGH SPEED AMPLIFIER, A1.
R2 10
R1 20
SIGNAL
GND
A1: OP-177
ADOP-07
AD711
AD843
AD845
C1
Figure 15. Unipolar Binary Operation
Table III. Unipolar Binary Code Table
Digital Input
Analog Output
MSB………LSB
(VOUT As Shown in Figure 15)
1111 1111 1111
–VREF (4095/4096)
1000 0000 0001
–VREF (2049/4096)
1000 0000 0000
–VREF (2048/4096)
0111 1111 1111
–VREF (2047/4096)
0000 0000 0001
–VREF (1/4096)
0000 0000 0000
–VREF (0/4096) = 0
NOTE
Nominal LSB size for the circuit of Figure 15 is given by:
VREF (1/4096).
BIPOLAR OPERATION
(4-Quadrant Multiplication)
Figure 16 shows the standard connection diagram for bipolar
operation of any one of the DACs in the AD7568. The coding is
offset binary as shown in Table IV. When VIN is an ac signal,
the circuit performs 4-quadrant multiplication. To maintain the
gain error specifications, resistors R3, R4 and R5 should be ra-
tio matched to 0.01%.
DAC A
A1
I
A
OUT1
I
A
OUT2
AD7568
V
OUT
R
A
FB
V
A
REF
V
IN
NOTES
1. ONLY ONE DAC IS SHOWN FOR CLARITY.
2. DIGITAL INPUT CONNECTIONS ARE OMITTED.
3. C1 PHASE COMPENSATION (5–15pF) MAY BE
REQUIRED WHEN USING HIGH SPEED AMPLIFIER, A1.
R2 10
R1 20
SIGNAL
GND
C1
A2
R3
10k
R5
20k
20k
R4
Figure 16. Bipolar Operation (4-Quadrant Multiplication)
Table IV. Bipolar (Offset Binary) Code Table
Digital Input
Analog Output
MSB . . . . . LSB
(VOUT As Shown in Figure 16)
1111 1111 1111
+VREF (2047/2048)
1000 0000 0001
+VREF (1/2048)
1000 0000 0000
+VREF (0/2048) = 0
0111 1111 1111
–VREF (1/2048)
0000 0000 0001
–VREF (2047/2048)
0000 0000 0000
–VREF (2048/2048) = –VREF
NOTE
Nominal LSB size for the circuit of Figure 16 is given by:
VREF (1/2048).
SINGLE SUPPLY CIRCUITS
The AD7568 operates from a single +5 V supply, and this
makes it ideal for single supply systems. When operating in such
a system, it is not possible to use the standard circuits of Figures
15 and 16 since these invert the analog input, VIN. There are
two alternatives. One of these continues to operate the DAC as
a current-mode device, while the other uses the voltage switch-
ing mode.
DAC A
A1
I
A
OUT1
I
A
OUT2
AD7568
V
BIAS
V
OUT
R
A
FB
V
A
REF
V
IN
NOTES
1. ONLY ONE DAC IS SHOWN FOR CLARITY.
2. DIGITAL INPUT CONNECTIONS ARE OMITTED.
3. C1 PHASE COMPENSATION (5–15pF) MAY BE
REQUIRED WHEN USING HIGH SPEED AMPLIFIER, A1.
Figure 17. Single Supply Current-Mode Operation
REV. C
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