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參數(shù)資料
| 型號(hào)： | AD7654ASTRL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | Dual 2-Channel Simultaneous Sampling SAR 500 kSPS 16-Bit ADC |
| 中文描述： | 4-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, PQFP48 |
| 封裝： | MS-026-BBC, LQFP-48 |
| 文件頁數(shù)： | 8/24頁 |
| 文件大?。?/td> | 734K |
| 代理商： | AD7654ASTRL |
REV. 0
–8–
AD7654
Pin No.
Mnemonic
Type
Description
24
D[11]
DO
When SER/
PAR
is LOW, this output is used as Bit 11 of the Parallel Port Data
Output Bus.
When SER/
PAR
is HIGH and EXT/
INT
is HIGH, this output, part of the serial
port, is used as an incomplete read error flag. In Slave mode, when a data read is
started and not complete when the following conversion is complete, the current data
is lost and RDERROR is pulsed high.
Bit 12 to Bit 15 of the Parallel Port Data Output Bus. When SER/
PAR
is HIGH,
these outputs are in high impedance.
Busy Output. Transitions HIGH when a conversion is started and remains HIGH
until the two conversions are complete and the data are latched into the on-chip shift
register. The falling edge of BUSY can be used as a data ready clock signal.
End of Convert Output. Goes LOW at each channel conversion.
Read Data. When
CS
and
RD
are both LOW, the interface parallel or serial output
bus is enabled.
Chip Select. When
CS
and
RD
are both LOW, the interface parallel or serial output
bus is enabled.
CS
is also used to gate the external serial clock.
Reset Input. When set to a logic HIGH, reset the AD7654. Current conversion if any
is aborted. If not used, this pin could be tied to DGND.
Power-Down Input. When set to a logic HIGH, power consumption is reduced and
conversions are inhibited after the current one is completed.
Start Conversion. A falling edge on
CNVST
puts the internal sample-and-hold into the
hold state and initiates a conversion. In Impulse Mode (IMPULSE HIGH), if
CNVST
is held low when the acquisition phase (t
8
) is complete, the internal sample-
and-hold is put into the hold state and a conversion is immediately started.
This input pin is used to provide a reference to the converter.
Reference Input Analog Ground
Analog Inputs
Analog Inputs Ground Senses. Allow to sense each channel ground independently.
These inputs are the references applied to channel A and channel B, respectively.
or RDERROR
25–28
D[12:15]
DO
29
BUSY
DO
30
31
EOC
RD
DO
DI
32
CS
DI
33
RESET
DI
34
PD
DI
35
CNVST
DI
37
38
39, 41
40, 45
42, 43
44, 46
REF
REFGND
INB1, INB2
INBN, INAN
REFB, REFA
INA2, INA1
AI
AI
AI
AI
AI
NOTES
AI = Analog Input
DI = Digital Input
DI/O = Bidirectional Digital
DO = Digital Output
P = Power
PIN FUNCTION DESCRIPTIONS (continued)
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| AD7655ASTRL | Low Cost 4-Channel 1 MSPS 16-Bit ADC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7654ASTZ | 功能描述:IC ADC 16BIT 500KSPS DUAL 48LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:PulSAR® 標(biāo)準(zhǔn)包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個(gè)單端，單極 產(chǎn)品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| AD7654ASTZ | 制造商:Analog Devices 功能描述:IC 16BIT ADC SMD 7654 LQFP48 |
| AD7654ASTZRL | 功能描述:IC ADC 16BIT DUAL 2CH 48LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:PulSAR® 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個(gè)單端，單極；1 個(gè)單端，雙極 |
| AD7655 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 1 MSPS, Differential, Programmable Input PulSAR ADC |
| AD7655ACP | 制造商:Analog Devices 功能描述:ADC Single SAR 1Msps 16-bit Parallel/Serial 48-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:LOW COST 4-CHANNEL 1 MSPS 16-BIT ADC - Bulk 制造商:Analog Devices 功能描述:IC 16BIT ADC SMD 7655 LFSCP-48 |
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