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參數(shù)資料
| 型號： | AD7665 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | TV 8C 8#20 PIN PLUG |
| 中文描述： | 16位，570 kSPS的的CMOS模數(shù)轉(zhuǎn)換器 |
| 文件頁數(shù)： | 17/24頁 |
| 文件大小： | 348K |
| 代理商： | AD7665 |
REV. 0
AD7665
–17–
DIGITAL INTERFACE
The AD7665 has a versatile digital interface; it can be interfaced
with the host system by using either a serial or parallel interface.
The serial interface is multiplexed on the parallel data bus. The
AD7665 digital interface also accommodates both 3 V or 5 V
logic by simply connecting the OVDD supply pin of the AD7665
to the host system interface digital supply. Finally, by using the
OB/
2C
input pin, both two’s complement or straight binary
coding can be used.
The two signals
CS
and
RD
control the interface. When at least
one of these signals is high, the interface outputs are in high
impedance. Usually,
CS
allows the selection of each AD7665 in
multicircuits applications and is held low in a single AD7665
design.
RD
is generally used to enable the conversion result on
the data bus.
t
1
t
3
t
4
t
11
CNVST
BUSY
DATA
BUS
CS
=
RD
= 0
t
10
PREVIOUS CONVERSION DATA
NEW DATA
Figure 13. Master Parallel Data Timing for Reading
(Continuous Read)
PARALLEL INTERFACE
The AD7665 is configured to use the parallel interface when the
SER/
PAR
is held low. The data can be read either after each
conversion, which is during the next acquisition phase, or dur-
ing the following conversion as shown, respectively, in Figure 14
and Figure 15. When the data is read during the conversion,
however, it is recommended that it be read only during the first
half of the conversion phase. That avoids any potential feed-
through between voltage transients on the digital interface and
the most critical analog conversion circuitry.
CURRENT
CONVERSION
BUSY
DATA
BUS
CS
RD
t
12
t
13
Figure 14. Slave Parallel Data Timing for Reading (Read
After Convert)
PREVIOUS
CONVERSION
t
1
t
3
t
12
t
13
t
4
CS
= 0
CNVST
,
RD
BUSY
DATA
BUS
Figure 15. Slave Parallel Data Timing for Reading (Read
During Convert)
The BYTESWAP pin allows a glueless interface to an 8-bit bus.
As shown in Figure 16, the LSB byte is output on D[7:0] and
the MSB is output on D[15:8] when BYTESWAP is low. When
BYTESWAP is high, the LSB and MSB bytes are swapped and
the LSB is output on D[15:8] and the MSB is output on D[7:0].
By connecting BYTESWAP to an address line, the 16 data bits
can be read in 2 bytes on either D[15:8] or D[7:0].
CS
BYTE
PINS D[15:8]
HI-Z
HIGH BYTE
LOW BYTE
HI-Z
HI-Z
HIGH BYTE
LOW BYTE
HI-Z
t
12
t
12
t
13
PINS D[7:0]
RD
Figure 16. 8-Bit Parallel Interface
SERIAL INTERFACE
The AD7665 is configured to use the serial interface when the
SER/
PAR
is held high. The AD7665 outputs 16 bits of data,
MSB first, on the SDOUT pin. This data is synchronized with
the 16 clock pulses provided on SCLK pin. The output data is
valid on both the rising and falling edge of the data clock.
MASTER SERIAL INTERFACE
Internal Clock
The AD7665 is configured to generate and provide the serial
data clock SCLK when the EXT/
INT
pin is held low. It also
generates a SYNC signal to indicate to the host when the serial
data is valid. The serial clock SCLK and the SYNC signal can
be inverted if desired. Depending on RDC/SDIN input, the
data can be read after each conversion or during conversion.
Figure 17 and Figure 18 show the detailed timing diagrams of
these two modes.
Usually, because the AD7665 is used with a fast throughput, the
mode master, read during conversion is the most recommended
serial mode when it can be used.
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PDF描述 |
|---|---|
| AD7665AST | 16-Bit, 570 kSPS CMOS ADC |
| AD7665ASTRL | 16-Bit, 570 kSPS CMOS ADC |
| AD7669AN | LC2MOS Complete, 8-Bit Analog I/0 Systems |
| AD7569TE | LC2MOS Complete, 8-Bit Analog I/0 Systems |
| AD7569KN | LC2MOS Complete, 8-Bit Analog I/0 Systems |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD7665ACP | 制造商:Analog Devices 功能描述:ADC Single SAR 570ksps 16-bit Parallel/Serial 48-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:16-BIT, 500 KSPS CMOS A/D CONVERTER - Bulk |
| AD7665ACPRL | 制造商:Analog Devices 功能描述:ADC Single SAR 570ksps 16-bit Parallel/Serial 48-Pin LFCSP EP T/R |
| AD7665ACPZ | 功能描述:IC ADC 16BIT CMOS 5V 48LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:PulSAR® 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD7665ACPZRL | 功能描述:IC ADC 16BIT CMOS 5V 48LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:PulSAR® 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD7665AST | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述:Analog-Digital Converter IC Number of Bi |
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